M fs/asm/arm.fs => fs/asm/arm.fs +5 -0
@@ 55,3 55,8 @@ $e5000000 const str) $e5100000 const ldr)
: -r) ( op r -- op ) -i) $02000000 or ;
: 8b) $00400000 or ;
: !) $00200000 or ;
+
+\ Branching
+: b) ( rel32 -- op ) >> >> 2 - $ffffff and $ea000000 or ;
+: bl) b) $01000000 or ;
+: bx) ( r -- op ) $e12fff10 or ;
M fs/doc/asm/arm.txt => fs/doc/asm/arm.txt +17 -5
@@ 1,11 1,11 @@
# ARM assembler
-ARM instructions all encode to a 32-bit number and the way these encoding work
+ARM instructions all encode to a 32-bit number and the way these encodings work
incite us to deviate a little bit from the general Dusk assembler mechanism:
-Instead of pushing arguments to PS and then call the "operation writer" word,
-we instead begin the the operation mnemonic and "accumulate" arguments into it.
-When all arguments are accumulated, the number of PS is exactly what we want to
-write, which we can do with "le,", of which ",)" is an alias.
+Instead of pushing arguments to PS and then call the "operation writer" word, we
+begin the operation mnemonic and "accumulate" arguments into it. When all
+arguments are accumulated, the number on PS is exactly what we want to write,
+which we can do with "le,", of which ",)" is an alias.
For example, to write a "add" instruction with r4 as a destination (Rd), r5 as
the first operand (Rn) and 42 as an immediate, we would do:
@@ 71,3 71,15 @@ words:
post) op -- op Add offset after transfer
8b) op -- op Load/Store operation is 8-bit
!) op -- op Write effective address back to rn)
+
+## Branching
+
+The b) bl) and bx) branching words differ from other mnemonic words because they
+need an argument from PS. In the case of b) and bl), it's a relative offset that
+follows rules described in doc/asm/intro, that is, that "0" must mean an
+infinite loop.
+
+In the case of bx), the argument is a register ID. Examples:
+
+ begin abs>rel b) ,) \ infinite loop
+ r0 bx) eq) ,) \ jump to address in R0 if Z is set
M fs/xcomp/arm/rpi/kernel.fs => fs/xcomp/arm/rpi/kernel.fs +1 -1
@@ 61,4 61,4 @@ mov) r1 rd) $300 i) ,) add) r1 rd) r1 rn) $01 i) ,)
str) r1 rd) r2 rn) UART0_CR +i) ,)
mov) r1 rd) 'X' i) ,) str) r1 rd) r2 rn) UART0_DR +i) ,)
-$eafffffe , \ hardcoded "b -2"
+0 b) ,)