~sircmpwn/linux

linux/arch/arm/boot/dts/ste-hrefprev60.dtsi -rw-r--r-- 2.5 KiB
a99d8080 — Linus Torvalds Linux 5.4-rc6 11 months ago
                                                                                
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2012 ST-Ericsson AB
 *
 * Device Tree for the HREF+ prior to the v60 variant.
 */

#include "ste-dbx5x0.dtsi"
#include "ste-href-ab8500.dtsi"
#include "ste-href.dtsi"

/ {
	gpio_keys {
		button@1 {
			gpios = <&tc3589x_gpio 7 GPIO_ACTIVE_HIGH>;
		};
	};

	soc {
		/* Enable UART1 on this board */
		uart@80121000 {
			status = "okay";
		};

		i2c@80004000 {
			tps61052@33 {
				compatible = "ti,tps61052";
				reg = <0x33>;
			};

			tc35892@42 {
				compatible = "toshiba,tc35892";
				reg = <0x42>;
				interrupt-parent = <&gpio6>;
				interrupts = <25 IRQ_TYPE_EDGE_RISING>;
				pinctrl-names = "default";
				pinctrl-0 = <&tc35892_hrefprev60_mode>;

				interrupt-controller;
				#interrupt-cells = <1>;

				tc3589x_gpio: tc3589x_gpio {
					compatible = "tc3589x-gpio";
					interrupts = <0>;

					interrupt-controller;
					#interrupt-cells = <2>;
					gpio-controller;
					#gpio-cells = <2>;
				};
			};
		};

		spi@80002000 {
			/*
			 * On the first generation boards, this SSP/SPI port was connected
			 * to the AB8500.
			 */
			pinctrl-names = "default";
			pinctrl-0 = <&ssp0_hrefprev60_mode>;
		};

		// External Micro SD slot
		sdi0_per1@80126000 {
			cd-gpios  = <&tc3589x_gpio 3 GPIO_ACTIVE_HIGH>;
		};

		vmmci: regulator-gpio {
			gpios = <&tc3589x_gpio 18 GPIO_ACTIVE_HIGH>;
			enable-gpio = <&tc3589x_gpio 17 GPIO_ACTIVE_HIGH>;
			enable-active-high;
		};

		pinctrl {
			/* Set this up using hogs */
			pinctrl-names = "default";
			pinctrl-0 = <&ipgpio_hrefprev60_mode>;

			ssp0 {
				ssp0_hrefprev60_mode: ssp0_hrefprev60_default {
					hrefprev60_mux {
						function = "ssp0";
						groups = "ssp0_a_1";
					};
					hrefprev60_cfg1 {
						pins = "GPIO145_C13"; /* RXD */
						ste,config = <&in_pd>;
					};

				};
			};
			sdi0 {
				/* This additional pin needed on early MOP500 and HREFs previous to v60 */
				sdi0_default_mode: sdi0_default {
					hrefprev60_mux {
						function = "mc0";
						groups = "mc0dat31dir_a_1";
					};
					hrefprev60_cfg1 {
						pins = "GPIO21_AB3"; /* DAT31DIR */
						ste,config = <&out_hi>;
					};

				};
			};
			tc35892 {
				tc35892_hrefprev60_mode: tc35892_hrefprev60 {
					hrefprev60_cfg {
						pins = "GPIO217_AH12";
						ste,config = <&gpio_in_pu>;
					};
				};
			};
			ipgpio {
				 ipgpio_hrefprev60_mode: ipgpio_hrefprev60 {
					hrefprev60_mux {
						function = "ipgpio";
						groups = "ipgpio0_c_1", "ipgpio1_c_1";
					};
					hrefprev60_cfg1 {
						pins = "GPIO6_AF6", "GPIO7_AG5";
						ste,config = <&in_pu>;
					};
				 };
			};
		};
	};
};