~sircmpwn/linux

linux/arch/arm/boot/dts/imx51-digi-connectcore-jsk.dts -rw-r--r-- 2.2 KiB
a99d8080 — Linus Torvalds Linux 5.4-rc6 11 months ago
                                                                                
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
 */

#include "imx51-digi-connectcore-som.dtsi"

/ {
	model = "Digi ConnectCore CC(W)-MX51 JSK";
	compatible = "digi,connectcore-ccxmx51-jsk",
		     "digi,connectcore-ccxmx51-som", "fsl,imx51";

	chosen {
		stdout-path = &uart1;
	};
};

&esdhc1 {
	status = "okay";
};

&owire {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_owire>;
	status = "okay";
};

&pmic {
	fsl,mc13xxx-uses-rtc;

	regulators {
		vcoincell_reg: vcoincell {
			regulator-min-microvolt = <3000000>;
			regulator-max-microvolt = <3000000>;
			regulator-always-on;
		};
	};
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	status = "okay";
};

&usbotg {
	dr_mode = "otg";
	status = "okay";
};

&usbh1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usbh1>;
	dr_mode = "host";
	phy_type = "ulpi";
	disable-over-current;
	status = "okay";
};

&iomuxc {
	imx51-digi-connectcore-jsk {
		pinctrl_owire: owiregrp {
			fsl,pins = <
				MX51_PAD_OWIRE_LINE__OWIRE_LINE		0x40000000
			>;
		};

		pinctrl_uart1: uart1grp {
			fsl,pins = <
				MX51_PAD_UART1_RXD__UART1_RXD		0x1c5
				MX51_PAD_UART1_TXD__UART1_TXD		0x1c5
			>;
		};

		pinctrl_uart2: uart2grp {
			fsl,pins = <
				MX51_PAD_UART2_RXD__UART2_RXD		0x1c5
				MX51_PAD_UART2_TXD__UART2_TXD		0x1c5
			>;
		};

		pinctrl_uart3: uart3grp {
			fsl,pins = <
				MX51_PAD_UART3_RXD__UART3_RXD		0x1c5
				MX51_PAD_UART3_TXD__UART3_TXD		0x1c5
			>;
		};

		pinctrl_usbh1: usbh1grp {
			fsl,pins = <
				MX51_PAD_USBH1_DATA0__USBH1_DATA0	0x1e5
				MX51_PAD_USBH1_DATA1__USBH1_DATA1	0x1e5
				MX51_PAD_USBH1_DATA2__USBH1_DATA2	0x1e5
				MX51_PAD_USBH1_DATA3__USBH1_DATA3	0x1e5
				MX51_PAD_USBH1_DATA4__USBH1_DATA4	0x1e5
				MX51_PAD_USBH1_DATA5__USBH1_DATA5	0x1e5
				MX51_PAD_USBH1_DATA6__USBH1_DATA6	0x1e5
				MX51_PAD_USBH1_DATA7__USBH1_DATA7	0x1e5
				MX51_PAD_USBH1_CLK__USBH1_CLK		0x1e5
				MX51_PAD_USBH1_DIR__USBH1_DIR		0x1e5
				MX51_PAD_USBH1_NXT__USBH1_NXT		0x1e5
				MX51_PAD_USBH1_STP__USBH1_STP		0x1e5
			>;
		};
	};
};