M src/cart.asm => src/cart.asm +7 -4
@@ 2,6 2,13 @@
;; Cart
INCLUDE "src/head.asm"
+
+;; include sprites
+
+ .org $8000
+
+Sprites:
+ .incbin "src/sprite.chr"
.org $C000
;; init
@@ 39,7 46,3 @@ __NMI: ;
.dw __NMI
.dw __INIT
.dw 0
-
-;; include sprites
-
- .incbin "src/sprite.chr"
M src/head.asm => src/head.asm +10 -6
@@ 1,12 1,15 @@
;; iNES header
- .db "NES", $1a ; identification of the iNES header
- .db 1 ; number of 16KB PRG-ROM pages
- .db $01 ; number of 8KB CHR-ROM pages
- .db $00 ; NROM
- .dsb $09,$00 ; clear the remaining bytes
- .fillvalue $FF ; Sets all unused space in rom to value $FF
+ .db "NES",$1A
+ .db $02 ;Size of PRG ROM in 16 KB units
+ .db $00 ;Size of CHR ROM in 8 KB units (Value 0 means the board uses CHR RAM)
+ .db $21 ;Flags 6 (BNROM)
+ .db $20 ;Flags 7 (BNROM)
+ .db $00 ;Size of PRG RAM in 8 KB units (Value 0 infers 8 KB for compatibility)
+ .db $00 ;Flags 9
+ .db $00 ;Flags 10 (unofficial)
+ .db 0,0,0,0,0
;; constants
@@ 116,4 119,5 @@ reqdraw_splash .dsb 1
reqdraw_cursor .dsb 1
reqdraw_dialog .dsb 1
reqdraw_name .dsb 1
+ptr_src .dsb 1
.ende
M src/init.asm => src/init.asm +40 -0
@@ 33,6 33,46 @@
;; Init
+Clear_vram_loop:
+ STA PPUDATA
+ STA PPUDATA
+ STA PPUDATA
+ STA PPUDATA
+ STA PPUDATA
+ STA PPUDATA
+ STA PPUDATA
+ STA PPUDATA
+ DEY
+ BNE Clear_vram_loop
+ DEX
+ BNE Clear_vram_loop
+ ;load sprite base
+
+ LDA #$00
+ STA PPUADDR
+ LDA #$00
+ STA PPUADDR
+
+Load_sprites:
+ LDA #Sprites&255
+ STA ptr_src
+ LDA #Sprites/256
+ STA ptr_src+1
+ LDY #0 ; starting index into the first page
+ STY PPUMASK ; turn off rendering just in case
+ STY PPUADDR ; load the destination address into the PPU
+ STY PPUADDR
+ LDX #32 ; number of 256-byte pages to copy
+
+Loop:
+ LDA (ptr_src),y ; copy one byte
+ STA PPUDATA
+ INY
+ BNE Loop ; repeat until we finish the page
+ INC ptr_src+1 ; go to the next page
+ DEX
+ BNE Loop ; repeat until we've copied enough pages
+
loadPalette: ; [skip]
BIT PPUSTATUS
LDA #$3F