~nabijaczleweli/yaxpeax-superh

ref: 57bd929e01116532e2ceb761747aef6467707530 yaxpeax-superh/tests/bare/mod.rs -rw-r--r-- 1.5 KiB
57bd929eнаб Fix display of immediates a month ago
                                                                                
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
extern crate yaxpeax_superh;

use yaxpeax_superh::{SuperHInstruction, SuperHRegister};


#[test]
fn round_trip() {
    for i in 0..=0xFFFF {
        for &fpscr_sz in &[true, false] {
            if let Some(ins) = SuperHInstruction::parse(i, fpscr_sz) {
                let rt: u16 = ins.into();
                assert_eq!(rt, i as u16, "{:#06X} !+ {:#06X} for {:?}", rt, i as u16, ins);
            }
        }
    }
}

#[test]
fn display() {
    assert_eq!(format!("{}", SuperHInstruction::MovImm(0x69, SuperHRegister::R4)), "MOV #105,R4"); // Agrees with objdump
}


mod generated_f64 {
    use yaxpeax_superh::{SuperHInstruction, SuperHRegister, SuperHRegisterBank, SuperHFloatRegister, SuperHVectorFloatRegister, SuperHDoubleRegister,
                         SuperHExtendedDoubleRegister, Displacement4, Displacement8, Displacement12};
    include!("instruction_map-with-overrides.rs");
}

mod generated_no_f64 {
    use yaxpeax_superh::{SuperHInstruction, SuperHRegister, SuperHRegisterBank, SuperHFloatRegister, SuperHVectorFloatRegister, SuperHDoubleRegister,
                         Displacement4, Displacement8, Displacement12};
    include!("instruction_map-unoverriden.rs");
}

#[test]
fn decode_f64() {
    for (i, &ins) in generated_f64::MAPPING.iter().enumerate() {
        assert_eq!(SuperHInstruction::parse(i as u16, true), ins);
    }
}

#[test]
fn decode_no_f64() {
    for (i, &ins) in generated_no_f64::MAPPING.iter().enumerate() {
        assert_eq!(SuperHInstruction::parse(i as u16, false), ins);
    }
}