~maelkum/viuavm: Assemble and disassemble AA and AD instructions

60592a6cd0410a3900e4ff00485b43027e2c55d1 — Marek Marecki 4 months ago 241b755

Assemble and disassemble AA and AD instructions

The semantics described in commit
241b755da0ee740d9a08c6423d8094bc4eb463ab need to be amended. The
alignment of the memory area is now described by the unit specified in
the pseudoinstructions name:

 - abx: allocate bytes
 - ahx: allocate half-words
 - awx: allocate words
 - adx: allocate double-words
 - aqx: allocate quad-words

The same rule is used for AA and AD instructions. In source code, they
will appear like this:

    aha $ptr, $size, 0
    aa  16, $ptr, $size, 0

The last parameter MUST be zero; otherwise, the source is rejected and
compilation is aborted.

The design for PTR instruction should be revisited.

patch browse .tar.gz

3 files changed, 54 insertions(+), 2 deletions(-)

M new/include/viua/libs/lexer.h
M new/src/tools/exec/dis.cpp
M new/src/tools/libs/stage.cpp

M new/include/viua/libs/lexer.h => new/include/viua/libs/lexer.h +17 -0

@@ 268,6 268,12 @@ inline auto const OPCODE_NAMES = std::set<std::string>{
     "g.sm",
     "lm",
     "g.lm",
+    "aa",
+    "g.aa",
+    "ad",
+    "g.ad",
+    "ptr",
+    "g.ptr",
 
     /*
      * Pseudoinstructions listed below.


@@ 294,6 300,17 @@ inline auto const OPCODE_NAMES = std::set<std::string>{
     "sq",
     "lq",
     "mq",
+
+    "aba",
+    "aha",
+    "awa",
+    "ada",
+    "aqa",
+    "abd",
+    "ahd",
+    "awd",
+    "add",
+    "aqd",
 };
 
 auto lex(std::string_view) -> std::vector<Lexeme>;

M new/src/tools/exec/dis.cpp => new/src/tools/exec/dis.cpp +15 -2

@@ 416,7 416,7 @@ auto demangle_memory(Cooked_text& text) -> void
     using enum viua::arch::ops::OPCODE;
     for (auto i = size_t{0}; i < text.size(); ++i) {
         using viua::arch::ops::GREEDY;
-        if (m(i, SM) or m(i, LM)) {
+        if (m(i, SM) or m(i, LM) or m(i, AA) or m(i, AD)) {
             using viua::arch::ops::M;
             auto const op         = M::decode(ins_at(i));
 


@@ 428,9 428,12 @@ auto demangle_memory(Cooked_text& text) -> void
                 case LM:
                     name = "l";
                     break;
+                case AA:
+                case AD:
+                    name = "a";
+                    break;
                 default:
                     abort();
-                    break;
             }
             switch (op.spec) {
                 case 0:


@@ 452,6 455,16 @@ auto demangle_memory(Cooked_text& text) -> void
                     abort();
                     break;
             }
+            switch (static_cast<viua::arch::ops::OPCODE>(op.opcode)) {
+                case AA:
+                    name += "a";
+                    break;
+                case AD:
+                    name += "d";
+                    break;
+                default:
+                    break;
+            }
 
             auto idx          = text.at(i).index;
             idx.physical_span = idx.physical;

M new/src/tools/libs/stage.cpp => new/src/tools/libs/stage.cpp +22 -0

@@ 991,6 991,18 @@ auto expand_memory_access(std::vector<ast::Instruction>& cooked,
     auto synth        = ast::Instruction{};
     synth.opcode      = raw.opcode;
     synth.opcode.text[1] = 'm';
+    if (synth.opcode.text[0] == 'a') {
+        switch (synth.opcode.text.back()) {
+            case 'a':
+                synth.opcode.text = "aa";
+                break;
+            case 'd':
+                synth.opcode.text = "ad";
+                break;
+            default:
+                abort();
+        }
+    }
     synth.physical_index = raw.physical_index;
 
     synth.operands.push_back(raw.operands.at(0));


@@ 1049,6 1061,16 @@ auto expand_pseudoinstructions(std::vector<ast::Instruction> raw,
         "sq",
         "lq",
         "mq",
+        "aba",
+        "aha",
+        "awa",
+        "ada",
+        "aqa",
+        "abd",
+        "ahd",
+        "awd",
+        "add",
+        "aqd",
     };
 
     /*