~kdsch/libopencm3

3e96ec1b6201ac71edfe19ce47a1baca048bd15a — Karl Schultheisz 1 year, 4 months ago 6223afb
meson: fix source generation

Meson treats files appearing in the sources list differently depending
on their extension. Files that end in .c are assumed to be valid compilation
units with a corresponding object file. Files that do not end in .c, which
includes .h files, are not treated as precursors to object files, but still
represent dependencies of a target, possibly generated. Therefore, Meson does
not support generating .c files which are not intended to be valid compilation
units themselves.

Of course, this is precisely the case with the vector_nvic.c for each target.
It is not a valid compilaton unit, but is included by another file which is.
Therefore, I changed the extension to suit Meson. The Make build system should
be able to adapt to Meson's enforced convention.

Note that other possible extensions are also valid, which may better convey
the intent to readers. vector_nvic.h is not a proper header file, but neither
is it a "proper" C file according to Meson. Perhaps it needs a different
extension to reflect this atypical status.
124 files changed, 833 insertions(+), 278 deletions(-)

M .gitignore
M Makefile
A include/libopencm3/efm32/ezr32wg/meson.build
A include/libopencm3/efm32/g/meson.build
A include/libopencm3/efm32/gg/meson.build
A include/libopencm3/efm32/hg/meson.build
A include/libopencm3/efm32/lg/meson.build
A include/libopencm3/efm32/tg/meson.build
A include/libopencm3/efm32/wg/meson.build
A include/libopencm3/gd32/f1x0/meson.build
A include/libopencm3/lm3s/meson.build
A include/libopencm3/lpc13xx/meson.build
A include/libopencm3/lpc17xx/meson.build
A include/libopencm3/lpc43xx/m0/meson.build
A include/libopencm3/lpc43xx/m4/meson.build
M include/libopencm3/meson.build
A include/libopencm3/msp432/e4/meson.build
A include/libopencm3/nrf/51/meson.build
A include/libopencm3/nrf/52/meson.build
A include/libopencm3/pac55xx/meson.build
A include/libopencm3/sam/3a/meson.build
A include/libopencm3/sam/3n/meson.build
A include/libopencm3/sam/3s/meson.build
A include/libopencm3/sam/3u/meson.build
A include/libopencm3/sam/3x/meson.build
A include/libopencm3/sam/4l/meson.build
A include/libopencm3/sam/d/meson.build
A include/libopencm3/stm32/f0/meson.build
A include/libopencm3/stm32/f1/meson.build
A include/libopencm3/stm32/f2/meson.build
A include/libopencm3/stm32/f3/meson.build
A include/libopencm3/stm32/f4/meson.build
A include/libopencm3/stm32/f7/meson.build
A include/libopencm3/stm32/g0/meson.build
A include/libopencm3/stm32/g4/meson.build
A include/libopencm3/stm32/h7/meson.build
A include/libopencm3/stm32/l0/meson.build
A include/libopencm3/stm32/l1/meson.build
A include/libopencm3/stm32/l4/meson.build
A include/libopencm3/swm050/meson.build
A include/libopencm3/vf6xx/meson.build
A include/libopencmsis/efm32/ezr32wg/meson.build
A include/libopencmsis/efm32/g/meson.build
A include/libopencmsis/efm32/gg/meson.build
A include/libopencmsis/efm32/hg/meson.build
A include/libopencmsis/efm32/lg/meson.build
A include/libopencmsis/efm32/tg/meson.build
A include/libopencmsis/efm32/wg/meson.build
A include/libopencmsis/gd32/f1x0/meson.build
A include/libopencmsis/lm3s/meson.build
A include/libopencmsis/lpc13xx/meson.build
A include/libopencmsis/lpc17xx/meson.build
A include/libopencmsis/lpc43xx/m0/meson.build
A include/libopencmsis/lpc43xx/m4/meson.build
A include/libopencmsis/meson.build
A include/libopencmsis/msp432/e4/meson.build
A include/libopencmsis/nrf/51/meson.build
A include/libopencmsis/nrf/52/meson.build
A include/libopencmsis/pac55xx/meson.build
A include/libopencmsis/sam/3a/meson.build
A include/libopencmsis/sam/3n/meson.build
A include/libopencmsis/sam/3s/meson.build
A include/libopencmsis/sam/3u/meson.build
A include/libopencmsis/sam/3x/meson.build
A include/libopencmsis/sam/4l/meson.build
A include/libopencmsis/sam/d/meson.build
A include/libopencmsis/stm32/f0/meson.build
A include/libopencmsis/stm32/f1/meson.build
A include/libopencmsis/stm32/f2/meson.build
A include/libopencmsis/stm32/f3/meson.build
A include/libopencmsis/stm32/f4/meson.build
A include/libopencmsis/stm32/f7/meson.build
A include/libopencmsis/stm32/g0/meson.build
A include/libopencmsis/stm32/g4/meson.build
A include/libopencmsis/stm32/h7/meson.build
A include/libopencmsis/stm32/l0/meson.build
A include/libopencmsis/stm32/l1/meson.build
A include/libopencmsis/stm32/l4/meson.build
A include/libopencmsis/swm050/meson.build
A include/libopencmsis/vf6xx/meson.build
M lib/dispatch/vector_nvic.c
M lib/efm32/ezr32wg/meson.build
M lib/efm32/g/meson.build
M lib/efm32/gg/meson.build
M lib/efm32/hg/meson.build
M lib/efm32/lg/meson.build
M lib/efm32/tg/meson.build
M lib/efm32/wg/meson.build
M lib/gd32/f1x0/meson.build
M lib/lm3s/meson.build
M lib/lpc13xx/meson.build
M lib/lpc17xx/meson.build
M lib/lpc43xx/m0/meson.build
M lib/lpc43xx/m4/meson.build
M lib/meson.build
M lib/msp432/e4/meson.build
M lib/nrf/51/meson.build
M lib/nrf/52/meson.build
M lib/pac55xx/meson.build
M lib/sam/3a/meson.build
M lib/sam/3n/meson.build
M lib/sam/3s/meson.build
M lib/sam/3u/meson.build
M lib/sam/3x/meson.build
M lib/sam/4l/meson.build
M lib/sam/d/meson.build
M lib/stm32/f0/meson.build
M lib/stm32/f1/meson.build
M lib/stm32/f2/meson.build
M lib/stm32/f3/meson.build
M lib/stm32/f4/meson.build
M lib/stm32/f7/meson.build
M lib/stm32/g0/meson.build
M lib/stm32/g4/meson.build
M lib/stm32/h7/meson.build
M lib/stm32/l0/meson.build
M lib/stm32/l1/meson.build
M lib/stm32/l4/meson.build
M lib/swm050/meson.build
M lib/vf6xx/meson.build
M meson.build
M scripts/irq2nvic_h
M scripts/irq2nvic_h.py
M scripts/make2meson.awk
M .gitignore => .gitignore +2 -2
@@ 30,9 30,9 @@ include/libopencm3/**/**/nvic.h
!include/libopencm3/dispatch/nvic.h
!include/libopencm3/lm4f/nvic.h
lib/**/vector_nvic.c
lib/**/**/vector_nvic.c
lib/**/**/vector_nvic.h
# (not this one either)
!lib/dispatch/vector_nvic.c
!lib/dispatch/vector_nvic.h
DoxygenLayout.xml
doc/*/Doxyfile
doc/*/DoxygenLayout_*.xml

M Makefile => Makefile +2 -2
@@ 48,7 48,7 @@ endif
# Avoid the use of shell find, for windows compatibility
IRQ_DEFN_FILES  := $(foreach TARGET,$(TARGETS),$(wildcard include/libopencm3/$(TARGET)/irq.json))
NVIC_H := $(IRQ_DEFN_FILES:%/irq.json=%/nvic.h)
VECTOR_NVIC_C := $(IRQ_DEFN_FILES:./include/libopencm3/%/irq.json=./lib/%/vector_nvic.c)
VECTOR_NVIC_C := $(IRQ_DEFN_FILES:./include/libopencm3/%/irq.json=./lib/%/vector_nvic.h)
IRQHANDLERS_H := $(IRQ_DEFN_FILES:./include/libopencm3/%/irq.json=./include/libopencmsis/%/irqhandlers.h)
IRQ_GENERATED_FILES = $(NVIC_H) $(VECTOR_NVIC_C) $(IRQHANDLERS_H)
STYLECHECKFILES := $(wildcard include/*/*.h include/*/*/*.h include/*/*/*/*.h)


@@ 59,7 59,7 @@ all: build

build: lib

include/libopencm3/%/nvic.h lib/%/vector_nvic.c include/libopencmsis/%/irqhandlers.h: include/libopencm3/%/irq.json ./scripts/irq2nvic_h
include/libopencm3/%/nvic.h lib/%/vector_nvic.h include/libopencmsis/%/irqhandlers.h: include/libopencm3/%/irq.json ./scripts/irq2nvic_h
	@printf "  GENHDR  $*\n";
	$(Q)./scripts/irq2nvic_h ./$<;


A include/libopencm3/efm32/ezr32wg/meson.build => include/libopencm3/efm32/ezr32wg/meson.build +6 -0
@@ 0,0 1,6 @@
efm32ezr32wg_nvic_h = custom_target(
    'efm32ezr32wg_nvic.h',
    input: efm32ezr32wg_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/efm32/g/meson.build => include/libopencm3/efm32/g/meson.build +6 -0
@@ 0,0 1,6 @@
efm32g_nvic_h = custom_target(
    'efm32g_nvic.h',
    input: efm32g_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/efm32/gg/meson.build => include/libopencm3/efm32/gg/meson.build +6 -0
@@ 0,0 1,6 @@
efm32gg_nvic_h = custom_target(
    'efm32gg_nvic.h',
    input: efm32gg_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/efm32/hg/meson.build => include/libopencm3/efm32/hg/meson.build +6 -0
@@ 0,0 1,6 @@
efm32hg_nvic_h = custom_target(
    'efm32hg_nvic.h',
    input: efm32hg_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/efm32/lg/meson.build => include/libopencm3/efm32/lg/meson.build +6 -0
@@ 0,0 1,6 @@
efm32lg_nvic_h = custom_target(
    'efm32lg_nvic.h',
    input: efm32lg_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/efm32/tg/meson.build => include/libopencm3/efm32/tg/meson.build +6 -0
@@ 0,0 1,6 @@
efm32tg_nvic_h = custom_target(
    'efm32tg_nvic.h',
    input: efm32tg_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/efm32/wg/meson.build => include/libopencm3/efm32/wg/meson.build +6 -0
@@ 0,0 1,6 @@
efm32wg_nvic_h = custom_target(
    'efm32wg_nvic.h',
    input: efm32wg_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/gd32/f1x0/meson.build => include/libopencm3/gd32/f1x0/meson.build +6 -0
@@ 0,0 1,6 @@
gd32f1x0_nvic_h = custom_target(
    'gd32f1x0_nvic.h',
    input: gd32f1x0_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/lm3s/meson.build => include/libopencm3/lm3s/meson.build +6 -0
@@ 0,0 1,6 @@
lm3s_nvic_h = custom_target(
    'lm3s_nvic.h',
    input: lm3s_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/lpc13xx/meson.build => include/libopencm3/lpc13xx/meson.build +6 -0
@@ 0,0 1,6 @@
lpc13xx_nvic_h = custom_target(
    'lpc13xx_nvic.h',
    input: lpc13xx_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/lpc17xx/meson.build => include/libopencm3/lpc17xx/meson.build +6 -0
@@ 0,0 1,6 @@
lpc17xx_nvic_h = custom_target(
    'lpc17xx_nvic.h',
    input: lpc17xx_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/lpc43xx/m0/meson.build => include/libopencm3/lpc43xx/m0/meson.build +6 -0
@@ 0,0 1,6 @@
lpc43xxm0_nvic_h = custom_target(
    'lpc43xxm0_nvic.h',
    input: lpc43xxm0_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/lpc43xx/m4/meson.build => include/libopencm3/lpc43xx/m4/meson.build +6 -0
@@ 0,0 1,6 @@
lpc43xxm4_nvic_h = custom_target(
    'lpc43xxm4_nvic.h',
    input: lpc43xxm4_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

M include/libopencm3/meson.build => include/libopencm3/meson.build +39 -0
@@ 36,3 36,42 @@ stm32l1_json = files('stm32/l1/irq.json')
stm32l4_json = files('stm32/l4/irq.json')
swm050_json = files('swm050/irq.json')
vf6xx_json = files('vf6xx/irq.json')

subdir('efm32/ezr32wg')
subdir('efm32/g')
subdir('efm32/gg')
subdir('efm32/hg')
subdir('efm32/lg')
subdir('efm32/tg')
subdir('efm32/wg')
subdir('gd32/f1x0')
subdir('lm3s')
subdir('lpc13xx')
subdir('lpc17xx')
subdir('lpc43xx/m0')
subdir('lpc43xx/m4')
subdir('msp432/e4')
subdir('nrf/51')
subdir('nrf/52')
subdir('pac55xx')
subdir('sam/3a')
subdir('sam/3n')
subdir('sam/3s')
subdir('sam/3u')
subdir('sam/3x')
subdir('sam/4l')
subdir('sam/d')
subdir('stm32/f0')
subdir('stm32/f1')
subdir('stm32/f2')
subdir('stm32/f3')
subdir('stm32/f4')
subdir('stm32/f7')
subdir('stm32/g0')
subdir('stm32/g4')
subdir('stm32/h7')
subdir('stm32/l0')
subdir('stm32/l1')
subdir('stm32/l4')
subdir('swm050')
subdir('vf6xx')

A include/libopencm3/msp432/e4/meson.build => include/libopencm3/msp432/e4/meson.build +6 -0
@@ 0,0 1,6 @@
msp432e4_nvic_h = custom_target(
    'msp432e4_nvic.h',
    input: msp432e4_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/nrf/51/meson.build => include/libopencm3/nrf/51/meson.build +6 -0
@@ 0,0 1,6 @@
nrf51_nvic_h = custom_target(
    'nrf51_nvic.h',
    input: nrf51_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/nrf/52/meson.build => include/libopencm3/nrf/52/meson.build +6 -0
@@ 0,0 1,6 @@
nrf52_nvic_h = custom_target(
    'nrf52_nvic.h',
    input: nrf52_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/pac55xx/meson.build => include/libopencm3/pac55xx/meson.build +6 -0
@@ 0,0 1,6 @@
pac55xx_nvic_h = custom_target(
    'pac55xx_nvic.h',
    input: pac55xx_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/sam/3a/meson.build => include/libopencm3/sam/3a/meson.build +6 -0
@@ 0,0 1,6 @@
sam3a_nvic_h = custom_target(
    'sam3a_nvic.h',
    input: sam3a_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/sam/3n/meson.build => include/libopencm3/sam/3n/meson.build +6 -0
@@ 0,0 1,6 @@
sam3n_nvic_h = custom_target(
    'sam3n_nvic.h',
    input: sam3n_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/sam/3s/meson.build => include/libopencm3/sam/3s/meson.build +6 -0
@@ 0,0 1,6 @@
sam3s_nvic_h = custom_target(
    'sam3s_nvic.h',
    input: sam3s_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/sam/3u/meson.build => include/libopencm3/sam/3u/meson.build +6 -0
@@ 0,0 1,6 @@
sam3u_nvic_h = custom_target(
    'sam3u_nvic.h',
    input: sam3u_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/sam/3x/meson.build => include/libopencm3/sam/3x/meson.build +6 -0
@@ 0,0 1,6 @@
sam3x_nvic_h = custom_target(
    'sam3x_nvic.h',
    input: sam3x_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/sam/4l/meson.build => include/libopencm3/sam/4l/meson.build +6 -0
@@ 0,0 1,6 @@
sam4l_nvic_h = custom_target(
    'sam4l_nvic.h',
    input: sam4l_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/sam/d/meson.build => include/libopencm3/sam/d/meson.build +6 -0
@@ 0,0 1,6 @@
samd_nvic_h = custom_target(
    'samd_nvic.h',
    input: samd_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/stm32/f0/meson.build => include/libopencm3/stm32/f0/meson.build +6 -0
@@ 0,0 1,6 @@
stm32f0_nvic_h = custom_target(
    'stm32f0_nvic.h',
    input: stm32f0_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/stm32/f1/meson.build => include/libopencm3/stm32/f1/meson.build +6 -0
@@ 0,0 1,6 @@
stm32f1_nvic_h = custom_target(
    'stm32f1_nvic.h',
    input: stm32f1_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/stm32/f2/meson.build => include/libopencm3/stm32/f2/meson.build +6 -0
@@ 0,0 1,6 @@
stm32f2_nvic_h = custom_target(
    'stm32f2_nvic.h',
    input: stm32f2_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/stm32/f3/meson.build => include/libopencm3/stm32/f3/meson.build +6 -0
@@ 0,0 1,6 @@
stm32f3_nvic_h = custom_target(
    'stm32f3_nvic.h',
    input: stm32f3_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/stm32/f4/meson.build => include/libopencm3/stm32/f4/meson.build +6 -0
@@ 0,0 1,6 @@
stm32f4_nvic_h = custom_target(
    'stm32f4_nvic.h',
    input: stm32f4_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/stm32/f7/meson.build => include/libopencm3/stm32/f7/meson.build +6 -0
@@ 0,0 1,6 @@
stm32f7_nvic_h = custom_target(
    'stm32f7_nvic.h',
    input: stm32f7_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/stm32/g0/meson.build => include/libopencm3/stm32/g0/meson.build +6 -0
@@ 0,0 1,6 @@
stm32g0_nvic_h = custom_target(
    'stm32g0_nvic.h',
    input: stm32g0_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/stm32/g4/meson.build => include/libopencm3/stm32/g4/meson.build +6 -0
@@ 0,0 1,6 @@
stm32g4_nvic_h = custom_target(
    'stm32g4_nvic.h',
    input: stm32g4_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/stm32/h7/meson.build => include/libopencm3/stm32/h7/meson.build +6 -0
@@ 0,0 1,6 @@
stm32h7_nvic_h = custom_target(
    'stm32h7_nvic.h',
    input: stm32h7_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/stm32/l0/meson.build => include/libopencm3/stm32/l0/meson.build +6 -0
@@ 0,0 1,6 @@
stm32l0_nvic_h = custom_target(
    'stm32l0_nvic.h',
    input: stm32l0_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/stm32/l1/meson.build => include/libopencm3/stm32/l1/meson.build +6 -0
@@ 0,0 1,6 @@
stm32l1_nvic_h = custom_target(
    'stm32l1_nvic.h',
    input: stm32l1_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/stm32/l4/meson.build => include/libopencm3/stm32/l4/meson.build +6 -0
@@ 0,0 1,6 @@
stm32l4_nvic_h = custom_target(
    'stm32l4_nvic.h',
    input: stm32l4_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/swm050/meson.build => include/libopencm3/swm050/meson.build +6 -0
@@ 0,0 1,6 @@
swm050_nvic_h = custom_target(
    'swm050_nvic.h',
    input: swm050_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencm3/vf6xx/meson.build => include/libopencm3/vf6xx/meson.build +6 -0
@@ 0,0 1,6 @@
vf6xx_nvic_h = custom_target(
    'vf6xx_nvic.h',
    input: vf6xx_json,
    output: 'nvic.h',
    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/efm32/ezr32wg/meson.build => include/libopencmsis/efm32/ezr32wg/meson.build +6 -0
@@ 0,0 1,6 @@
efm32ezr32wg_irqhandlers_h = custom_target(
    'efm32ezr32wg_irqhandlers.h',
    input: efm32ezr32wg_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/efm32/g/meson.build => include/libopencmsis/efm32/g/meson.build +6 -0
@@ 0,0 1,6 @@
efm32g_irqhandlers_h = custom_target(
    'efm32g_irqhandlers.h',
    input: efm32g_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/efm32/gg/meson.build => include/libopencmsis/efm32/gg/meson.build +6 -0
@@ 0,0 1,6 @@
efm32gg_irqhandlers_h = custom_target(
    'efm32gg_irqhandlers.h',
    input: efm32gg_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/efm32/hg/meson.build => include/libopencmsis/efm32/hg/meson.build +6 -0
@@ 0,0 1,6 @@
efm32hg_irqhandlers_h = custom_target(
    'efm32hg_irqhandlers.h',
    input: efm32hg_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/efm32/lg/meson.build => include/libopencmsis/efm32/lg/meson.build +6 -0
@@ 0,0 1,6 @@
efm32lg_irqhandlers_h = custom_target(
    'efm32lg_irqhandlers.h',
    input: efm32lg_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/efm32/tg/meson.build => include/libopencmsis/efm32/tg/meson.build +6 -0
@@ 0,0 1,6 @@
efm32tg_irqhandlers_h = custom_target(
    'efm32tg_irqhandlers.h',
    input: efm32tg_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/efm32/wg/meson.build => include/libopencmsis/efm32/wg/meson.build +6 -0
@@ 0,0 1,6 @@
efm32wg_irqhandlers_h = custom_target(
    'efm32wg_irqhandlers.h',
    input: efm32wg_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/gd32/f1x0/meson.build => include/libopencmsis/gd32/f1x0/meson.build +6 -0
@@ 0,0 1,6 @@
gd32f1x0_irqhandlers_h = custom_target(
    'gd32f1x0_irqhandlers.h',
    input: gd32f1x0_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/lm3s/meson.build => include/libopencmsis/lm3s/meson.build +6 -0
@@ 0,0 1,6 @@
lm3s_irqhandlers_h = custom_target(
    'lm3s_irqhandlers.h',
    input: lm3s_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/lpc13xx/meson.build => include/libopencmsis/lpc13xx/meson.build +6 -0
@@ 0,0 1,6 @@
lpc13xx_irqhandlers_h = custom_target(
    'lpc13xx_irqhandlers.h',
    input: lpc13xx_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/lpc17xx/meson.build => include/libopencmsis/lpc17xx/meson.build +6 -0
@@ 0,0 1,6 @@
lpc17xx_irqhandlers_h = custom_target(
    'lpc17xx_irqhandlers.h',
    input: lpc17xx_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/lpc43xx/m0/meson.build => include/libopencmsis/lpc43xx/m0/meson.build +6 -0
@@ 0,0 1,6 @@
lpc43xxm0_irqhandlers_h = custom_target(
    'lpc43xxm0_irqhandlers.h',
    input: lpc43xxm0_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/lpc43xx/m4/meson.build => include/libopencmsis/lpc43xx/m4/meson.build +6 -0
@@ 0,0 1,6 @@
lpc43xxm4_irqhandlers_h = custom_target(
    'lpc43xxm4_irqhandlers.h',
    input: lpc43xxm4_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/meson.build => include/libopencmsis/meson.build +38 -0
@@ 0,0 1,38 @@
subdir('efm32/ezr32wg')
subdir('efm32/g')
subdir('efm32/gg')
subdir('efm32/hg')
subdir('efm32/lg')
subdir('efm32/tg')
subdir('efm32/wg')
subdir('gd32/f1x0')
subdir('lm3s')
subdir('lpc13xx')
subdir('lpc17xx')
subdir('lpc43xx/m0')
subdir('lpc43xx/m4')
subdir('msp432/e4')
subdir('nrf/51')
subdir('nrf/52')
subdir('pac55xx')
subdir('sam/3a')
subdir('sam/3n')
subdir('sam/3s')
subdir('sam/3u')
subdir('sam/3x')
subdir('sam/4l')
subdir('sam/d')
subdir('stm32/f0')
subdir('stm32/f1')
subdir('stm32/f2')
subdir('stm32/f3')
subdir('stm32/f4')
subdir('stm32/f7')
subdir('stm32/g0')
subdir('stm32/g4')
subdir('stm32/h7')
subdir('stm32/l0')
subdir('stm32/l1')
subdir('stm32/l4')
subdir('swm050')
subdir('vf6xx')

A include/libopencmsis/msp432/e4/meson.build => include/libopencmsis/msp432/e4/meson.build +6 -0
@@ 0,0 1,6 @@
msp432e4_irqhandlers_h = custom_target(
    'msp432e4_irqhandlers.h',
    input: msp432e4_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/nrf/51/meson.build => include/libopencmsis/nrf/51/meson.build +6 -0
@@ 0,0 1,6 @@
nrf51_irqhandlers_h = custom_target(
    'nrf51_irqhandlers.h',
    input: nrf51_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/nrf/52/meson.build => include/libopencmsis/nrf/52/meson.build +6 -0
@@ 0,0 1,6 @@
nrf52_irqhandlers_h = custom_target(
    'nrf52_irqhandlers.h',
    input: nrf52_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/pac55xx/meson.build => include/libopencmsis/pac55xx/meson.build +6 -0
@@ 0,0 1,6 @@
pac55xx_irqhandlers_h = custom_target(
    'pac55xx_irqhandlers.h',
    input: pac55xx_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/sam/3a/meson.build => include/libopencmsis/sam/3a/meson.build +6 -0
@@ 0,0 1,6 @@
sam3a_irqhandlers_h = custom_target(
    'sam3a_irqhandlers.h',
    input: sam3a_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/sam/3n/meson.build => include/libopencmsis/sam/3n/meson.build +6 -0
@@ 0,0 1,6 @@
sam3n_irqhandlers_h = custom_target(
    'sam3n_irqhandlers.h',
    input: sam3n_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/sam/3s/meson.build => include/libopencmsis/sam/3s/meson.build +6 -0
@@ 0,0 1,6 @@
sam3s_irqhandlers_h = custom_target(
    'sam3s_irqhandlers.h',
    input: sam3s_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/sam/3u/meson.build => include/libopencmsis/sam/3u/meson.build +6 -0
@@ 0,0 1,6 @@
sam3u_irqhandlers_h = custom_target(
    'sam3u_irqhandlers.h',
    input: sam3u_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/sam/3x/meson.build => include/libopencmsis/sam/3x/meson.build +6 -0
@@ 0,0 1,6 @@
sam3x_irqhandlers_h = custom_target(
    'sam3x_irqhandlers.h',
    input: sam3x_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/sam/4l/meson.build => include/libopencmsis/sam/4l/meson.build +6 -0
@@ 0,0 1,6 @@
sam4l_irqhandlers_h = custom_target(
    'sam4l_irqhandlers.h',
    input: sam4l_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/sam/d/meson.build => include/libopencmsis/sam/d/meson.build +6 -0
@@ 0,0 1,6 @@
samd_irqhandlers_h = custom_target(
    'samd_irqhandlers.h',
    input: samd_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/stm32/f0/meson.build => include/libopencmsis/stm32/f0/meson.build +6 -0
@@ 0,0 1,6 @@
stm32f0_irqhandlers_h = custom_target(
    'stm32f0_irqhandlers.h',
    input: stm32f0_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/stm32/f1/meson.build => include/libopencmsis/stm32/f1/meson.build +6 -0
@@ 0,0 1,6 @@
stm32f1_irqhandlers_h = custom_target(
    'stm32f1_irqhandlers.h',
    input: stm32f1_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/stm32/f2/meson.build => include/libopencmsis/stm32/f2/meson.build +6 -0
@@ 0,0 1,6 @@
stm32f2_irqhandlers_h = custom_target(
    'stm32f2_irqhandlers.h',
    input: stm32f2_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/stm32/f3/meson.build => include/libopencmsis/stm32/f3/meson.build +6 -0
@@ 0,0 1,6 @@
stm32f3_irqhandlers_h = custom_target(
    'stm32f3_irqhandlers.h',
    input: stm32f3_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/stm32/f4/meson.build => include/libopencmsis/stm32/f4/meson.build +6 -0
@@ 0,0 1,6 @@
stm32f4_irqhandlers_h = custom_target(
    'stm32f4_irqhandlers.h',
    input: stm32f4_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/stm32/f7/meson.build => include/libopencmsis/stm32/f7/meson.build +6 -0
@@ 0,0 1,6 @@
stm32f7_irqhandlers_h = custom_target(
    'stm32f7_irqhandlers.h',
    input: stm32f7_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/stm32/g0/meson.build => include/libopencmsis/stm32/g0/meson.build +6 -0
@@ 0,0 1,6 @@
stm32g0_irqhandlers_h = custom_target(
    'stm32g0_irqhandlers.h',
    input: stm32g0_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/stm32/g4/meson.build => include/libopencmsis/stm32/g4/meson.build +6 -0
@@ 0,0 1,6 @@
stm32g4_irqhandlers_h = custom_target(
    'stm32g4_irqhandlers.h',
    input: stm32g4_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/stm32/h7/meson.build => include/libopencmsis/stm32/h7/meson.build +6 -0
@@ 0,0 1,6 @@
stm32h7_irqhandlers_h = custom_target(
    'stm32h7_irqhandlers.h',
    input: stm32h7_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/stm32/l0/meson.build => include/libopencmsis/stm32/l0/meson.build +6 -0
@@ 0,0 1,6 @@
stm32l0_irqhandlers_h = custom_target(
    'stm32l0_irqhandlers.h',
    input: stm32l0_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/stm32/l1/meson.build => include/libopencmsis/stm32/l1/meson.build +6 -0
@@ 0,0 1,6 @@
stm32l1_irqhandlers_h = custom_target(
    'stm32l1_irqhandlers.h',
    input: stm32l1_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/stm32/l4/meson.build => include/libopencmsis/stm32/l4/meson.build +6 -0
@@ 0,0 1,6 @@
stm32l4_irqhandlers_h = custom_target(
    'stm32l4_irqhandlers.h',
    input: stm32l4_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/swm050/meson.build => include/libopencmsis/swm050/meson.build +6 -0
@@ 0,0 1,6 @@
swm050_irqhandlers_h = custom_target(
    'swm050_irqhandlers.h',
    input: swm050_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

A include/libopencmsis/vf6xx/meson.build => include/libopencmsis/vf6xx/meson.build +6 -0
@@ 0,0 1,6 @@
vf6xx_irqhandlers_h = custom_target(
    'vf6xx_irqhandlers.h',
    input: vf6xx_json,
    output: 'irqhandlers.h',
    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],
)

M lib/dispatch/vector_nvic.c => lib/dispatch/vector_nvic.c +38 -38
@@ 1,91 1,91 @@
#if defined(STM32F0)
#	include "../stm32/f0/vector_nvic.c"
#	include "../stm32/f0/vector_nvic.h"
#elif defined(STM32F1)
#	include "../stm32/f1/vector_nvic.c"
#	include "../stm32/f1/vector_nvic.h"
#elif defined(STM32F2)
#	include "../stm32/f2/vector_nvic.c"
#	include "../stm32/f2/vector_nvic.h"
#elif defined(STM32F3)
#	include "../stm32/f3/vector_nvic.c"
#	include "../stm32/f3/vector_nvic.h"
#elif defined(STM32F4)
#	include "../stm32/f4/vector_nvic.c"
#	include "../stm32/f4/vector_nvic.h"
#elif defined(STM32F7)
#	include "../stm32/f7/vector_nvic.c"
#	include "../stm32/f7/vector_nvic.h"
#elif defined(STM32L0)
#	include "../stm32/l0/vector_nvic.c"
#	include "../stm32/l0/vector_nvic.h"
#elif defined(STM32L1)
#	include "../stm32/l1/vector_nvic.c"
#	include "../stm32/l1/vector_nvic.h"
#elif defined(STM32L4)
#	include "../stm32/l4/vector_nvic.c"
#	include "../stm32/l4/vector_nvic.h"
#elif defined(STM32G0)
#	include "../stm32/g0/vector_nvic.c"
#	include "../stm32/g0/vector_nvic.h"
#elif defined(STM32G4)
#	include "../stm32/g4/vector_nvic.c"
#	include "../stm32/g4/vector_nvic.h"
#elif defined(STM32H7)
#	include "../stm32/h7/vector_nvic.c"
#	include "../stm32/h7/vector_nvic.h"

#elif defined(GD32F1X0)
#	include "../gd32/f1x0/vector_nvic.c"
#	include "../gd32/f1x0/vector_nvic.h"

#elif defined(EFM32TG)
#	include "../efm32/tg/vector_nvic.c"
#	include "../efm32/tg/vector_nvic.h"
#elif defined(EFM32G)
#	include "../efm32/g/vector_nvic.c"
#	include "../efm32/g/vector_nvic.h"
#elif defined(EFM32LG)
#	include "../efm32/lg/vector_nvic.c"
#	include "../efm32/lg/vector_nvic.h"
#elif defined(EFM32GG)
#	include "../efm32/gg/vector_nvic.c"
#	include "../efm32/gg/vector_nvic.h"
#elif defined(EFM32HG)
#	include "../efm32/hg/vector_nvic.c"
#	include "../efm32/hg/vector_nvic.h"
#elif defined(EFM32WG)
#	include "../efm32/wg/vector_nvic.c"
#	include "../efm32/wg/vector_nvic.h"
#elif defined(EZR32WG)
#	include "../efm32/ezr32wg/vector_nvic.c"
#	include "../efm32/ezr32wg/vector_nvic.h"

#elif defined(LPC13XX)
#	include "../lpc13xx/vector_nvic.c"
#	include "../lpc13xx/vector_nvic.h"
#elif defined(LPC17XX)
#	include "../lpc17xx/vector_nvic.c"
#	include "../lpc17xx/vector_nvic.h"
#elif defined(LPC43XX_M4)
#	include "../lpc43xx/m4/vector_nvic.c"
#	include "../lpc43xx/m4/vector_nvic.h"
#elif defined(LPC43XX_M0)
#	include "../lpc43xx/m0/vector_nvic.c"
#	include "../lpc43xx/m0/vector_nvic.h"

#elif defined(NRF51)
#	include "../nrf/51/vector_nvic.c"
#	include "../nrf/51/vector_nvic.h"
#elif defined(NRF52)
#	include "../nrf/52/vector_nvic.c"
#	include "../nrf/52/vector_nvic.h"

#elif defined(SAM3A)
#	include "../sam/3a/vector_nvic.c"
#	include "../sam/3a/vector_nvic.h"
#elif defined(SAM3N)
#	include "../sam/3n/vector_nvic.c"
#	include "../sam/3n/vector_nvic.h"
#elif defined(SAM3S)
#	include "../sam/3s/vector_nvic.c"
#	include "../sam/3s/vector_nvic.h"
#elif defined(SAM3U)
#	include "../sam/3u/vector_nvic.c"
#	include "../sam/3u/vector_nvic.h"
#elif defined(SAM3X)
#	include "../sam/3x/vector_nvic.c"
#	include "../sam/3x/vector_nvic.h"
#elif defined(SAM4L)
#	include "../sam/4l/vector_nvic.c"
#	include "../sam/4l/vector_nvic.h"
#elif defined(SAMD)
#	include "../sam/d/vector_nvic.c"
#	include "../sam/d/vector_nvic.h"

#elif defined(VF6XX)
#	include "../vf6xx/vector_nvic.c"
#	include "../vf6xx/vector_nvic.h"

#elif defined(PAC55XX)
#       include "../pac55xx/vector_nvic.c"
#       include "../pac55xx/vector_nvic.h"


#elif defined(LM3S) || defined(LM4F)
/* Yes, we use the same interrupt table for both LM3S and LM4F */
#	include "../lm3s/vector_nvic.c"
#	include "../lm3s/vector_nvic.h"

#elif defined(MSP432E4)
#       include "../msp432/e4/vector_nvic.c"
#       include "../msp432/e4/vector_nvic.h"

#elif defined(SWM050)
#       include "../swm050/vector_nvic.c"
#       include "../swm050/vector_nvic.h"

#else
#	warning "no interrupts defined for chipset;"\

M lib/efm32/ezr32wg/meson.build => lib/efm32/ezr32wg/meson.build +4 -4
@@ 1,6 1,6 @@
efm32ezr32wg_irq = custom_target(
    'efm32ezr32wg' + ' '.join(outfiles),
efm32ezr32wg_vector_nvic_h = custom_target(
    'efm32ezr32wg_vector_nvic.h',
    input: efm32ezr32wg_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'efm32/ezr32wg'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/efm32/g/meson.build => lib/efm32/g/meson.build +4 -4
@@ 1,6 1,6 @@
efm32g_irq = custom_target(
    'efm32g' + ' '.join(outfiles),
efm32g_vector_nvic_h = custom_target(
    'efm32g_vector_nvic.h',
    input: efm32g_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'efm32/g'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/efm32/gg/meson.build => lib/efm32/gg/meson.build +4 -4
@@ 1,6 1,6 @@
efm32gg_irq = custom_target(
    'efm32gg' + ' '.join(outfiles),
efm32gg_vector_nvic_h = custom_target(
    'efm32gg_vector_nvic.h',
    input: efm32gg_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'efm32/gg'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/efm32/hg/meson.build => lib/efm32/hg/meson.build +4 -4
@@ 1,6 1,6 @@
efm32hg_irq = custom_target(
    'efm32hg' + ' '.join(outfiles),
efm32hg_vector_nvic_h = custom_target(
    'efm32hg_vector_nvic.h',
    input: efm32hg_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'efm32/hg'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/efm32/lg/meson.build => lib/efm32/lg/meson.build +4 -4
@@ 1,6 1,6 @@
efm32lg_irq = custom_target(
    'efm32lg' + ' '.join(outfiles),
efm32lg_vector_nvic_h = custom_target(
    'efm32lg_vector_nvic.h',
    input: efm32lg_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'efm32/lg'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/efm32/tg/meson.build => lib/efm32/tg/meson.build +4 -4
@@ 1,6 1,6 @@
efm32tg_irq = custom_target(
    'efm32tg' + ' '.join(outfiles),
efm32tg_vector_nvic_h = custom_target(
    'efm32tg_vector_nvic.h',
    input: efm32tg_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'efm32/tg'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/efm32/wg/meson.build => lib/efm32/wg/meson.build +4 -4
@@ 1,6 1,6 @@
efm32wg_irq = custom_target(
    'efm32wg' + ' '.join(outfiles),
efm32wg_vector_nvic_h = custom_target(
    'efm32wg_vector_nvic.h',
    input: efm32wg_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'efm32/wg'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/gd32/f1x0/meson.build => lib/gd32/f1x0/meson.build +4 -4
@@ 1,6 1,6 @@
gd32f1x0_irq = custom_target(
    'gd32f1x0' + ' '.join(outfiles),
gd32f1x0_vector_nvic_h = custom_target(
    'gd32f1x0_vector_nvic.h',
    input: gd32f1x0_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'gd32/f1x0'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/lm3s/meson.build => lib/lm3s/meson.build +4 -4
@@ 1,6 1,6 @@
lm3s_irq = custom_target(
    'lm3s' + ' '.join(outfiles),
lm3s_vector_nvic_h = custom_target(
    'lm3s_vector_nvic.h',
    input: lm3s_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'lm3s'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/lpc13xx/meson.build => lib/lpc13xx/meson.build +4 -4
@@ 1,6 1,6 @@
lpc13xx_irq = custom_target(
    'lpc13xx' + ' '.join(outfiles),
lpc13xx_vector_nvic_h = custom_target(
    'lpc13xx_vector_nvic.h',
    input: lpc13xx_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'lpc13xx'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/lpc17xx/meson.build => lib/lpc17xx/meson.build +4 -4
@@ 1,6 1,6 @@
lpc17xx_irq = custom_target(
    'lpc17xx' + ' '.join(outfiles),
lpc17xx_vector_nvic_h = custom_target(
    'lpc17xx_vector_nvic.h',
    input: lpc17xx_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'lpc17xx'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/lpc43xx/m0/meson.build => lib/lpc43xx/m0/meson.build +4 -4
@@ 1,6 1,6 @@
lpc43xxm0_irq = custom_target(
    'lpc43xxm0' + ' '.join(outfiles),
lpc43xxm0_vector_nvic_h = custom_target(
    'lpc43xxm0_vector_nvic.h',
    input: lpc43xxm0_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'lpc43xx/m0'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/lpc43xx/m4/meson.build => lib/lpc43xx/m4/meson.build +4 -4
@@ 1,6 1,6 @@
lpc43xxm4_irq = custom_target(
    'lpc43xxm4' + ' '.join(outfiles),
lpc43xxm4_vector_nvic_h = custom_target(
    'lpc43xxm4_vector_nvic.h',
    input: lpc43xxm4_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'lpc43xx/m4'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/meson.build => lib/meson.build +39 -39
@@ 17,7 17,7 @@ targets += {
        '-mfloat-abi=hard',
        '-mfpu=fpv4-sp-d16',
    ],
    'src': src_cm3 + efm32ezr32wg_irq + files(
    'src': src_cm3 + efm32ezr32wg_vector_nvic_h + efm32ezr32wg_irqhandlers_h + efm32ezr32wg_nvic_h + files(
        'efm32/common/acmp_common.c',
        'efm32/common/adc_common.c',
        'efm32/common/burtc_common.c',


@@ 60,7 60,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + efm32gg_irq + files(
    'src': src_cm3 + efm32gg_vector_nvic_h + efm32gg_irqhandlers_h + efm32gg_nvic_h + files(
    ),
}



@@ 77,7 77,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + efm32g_irq + files(
    'src': src_cm3 + efm32g_vector_nvic_h + efm32g_irqhandlers_h + efm32g_nvic_h + files(
    ),
}



@@ 94,7 94,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + efm32hg_irq + files(
    'src': src_cm3 + efm32hg_vector_nvic_h + efm32hg_irqhandlers_h + efm32hg_nvic_h + files(
        'efm32/common/gpio_common.c',
        'efm32/common/timer_common.c',
        'efm32/hg/cmu.c',


@@ 124,7 124,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + efm32lg_irq + files(
    'src': src_cm3 + efm32lg_vector_nvic_h + efm32lg_irqhandlers_h + efm32lg_nvic_h + files(
        'efm32/common/acmp_common.c',
        'efm32/common/adc_common.c',
        'efm32/common/burtc_common.c',


@@ 167,7 167,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + efm32tg_irq + files(
    'src': src_cm3 + efm32tg_vector_nvic_h + efm32tg_irqhandlers_h + efm32tg_nvic_h + files(
    ),
}



@@ 186,7 186,7 @@ targets += {
        '-mfloat-abi=hard',
        '-mfpu=fpv4-sp-d16',
    ],
    'src': src_cm3 + efm32wg_irq + files(
    'src': src_cm3 + efm32wg_vector_nvic_h + efm32wg_irqhandlers_h + efm32wg_nvic_h + files(
        'efm32/common/acmp_common.c',
        'efm32/common/adc_common.c',
        'efm32/common/burtc_common.c',


@@ 229,7 229,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + gd32f1x0_irq + files(
    'src': src_cm3 + gd32f1x0_vector_nvic_h + gd32f1x0_irqhandlers_h + gd32f1x0_nvic_h + files(
        'gd32/f1x0/flash.c',
        'gd32/f1x0/rcc.c',
        'stm32/common/flash_common_all.c',


@@ 254,7 254,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + lm3s_irq + files(
    'src': src_cm3 + lm3s_vector_nvic_h + lm3s_irqhandlers_h + lm3s_nvic_h + files(
        'lm3s/gpio.c',
        'lm3s/rcc.c',
        'lm3s/usart.c',


@@ 274,7 274,7 @@ targets += {
        '-mfloat-abi=hard',
        '-mfpu=fpv4-sp-d16',
    ],
    'src': src_cm3 + lm4f_irq + files(
    'src': src_cm3 + files(
        'lm4f/gpio.c',
        'lm4f/rcc.c',
        'lm4f/systemcontrol.c',


@@ 304,7 304,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + lpc13xx_irq + files(
    'src': src_cm3 + lpc13xx_vector_nvic_h + lpc13xx_irqhandlers_h + lpc13xx_nvic_h + files(
        'lpc13xx/gpio.c',
    ),
}


@@ 322,7 322,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + lpc17xx_irq + files(
    'src': src_cm3 + lpc17xx_vector_nvic_h + lpc17xx_irqhandlers_h + lpc17xx_nvic_h + files(
        'lpc17xx/gpio.c',
        'lpc17xx/pwr.c',
    ),


@@ 342,7 342,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + lpc43xxm0_irq + files(
    'src': src_cm3 + lpc43xxm0_vector_nvic_h + lpc43xxm0_irqhandlers_h + lpc43xxm0_nvic_h + files(
        'lpc43xx/gpio.c',
        'lpc43xx/i2c.c',
        'lpc43xx/scu.c',


@@ 368,7 368,7 @@ targets += {
        '-mfloat-abi=hard',
        '-mfpu=fpv4-sp-d16',
    ],
    'src': src_cm3 + lpc43xxm4_irq + files(
    'src': src_cm3 + lpc43xxm4_vector_nvic_h + lpc43xxm4_irqhandlers_h + lpc43xxm4_nvic_h + files(
        'lpc43xx/gpio.c',
        'lpc43xx/i2c.c',
        'lpc43xx/ipc.c',


@@ 394,7 394,7 @@ targets += {
        '-mfloat-abi=hard',
        '-mfpu=fpv4-sp-d16',
    ],
    'src': src_cm3 + msp432e4_irq + files(
    'src': src_cm3 + msp432e4_vector_nvic_h + msp432e4_irqhandlers_h + msp432e4_nvic_h + files(
        'msp432/e4/gpio.c',
        'msp432/e4/systemcontrol.c',
    ),


@@ 414,7 414,7 @@ targets += {
    'fp_args': [
        '-msoft-float',
    ],
    'src': src_cm3 + nrf51_irq + files(
    'src': src_cm3 + nrf51_vector_nvic_h + nrf51_irqhandlers_h + nrf51_nvic_h + files(
        'nrf/51/./radio.c',
        'nrf/51/clock.c',
        'nrf/common/clock_common.c',


@@ 443,7 443,7 @@ targets += {
        '-mfloat-abi=hard',
        '-mfpu=fpv4-sp-d16',
    ],
    'src': src_cm3 + nrf52_irq + files(
    'src': src_cm3 + nrf52_vector_nvic_h + nrf52_irqhandlers_h + nrf52_nvic_h + files(
        'nrf/52/i2c.c',
        'nrf/common/clock_common.c',
        'nrf/common/gpio.c',


@@ 471,7 471,7 @@ targets += {
        '-mfloat-abi=hard',
        '-mfpu=fpv4-sp-d16',
    ],
    'src': src_cm3 + pac55xx_irq + files(
    'src': src_cm3 + pac55xx_vector_nvic_h + pac55xx_irqhandlers_h + pac55xx_nvic_h + files(
        'pac55xx/can.c',
        'pac55xx/ccs.c',
        'pac55xx/gpio.c',


@@ 493,7 493,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + sam3a_irq + files(
    'src': src_cm3 + sam3a_vector_nvic_h + sam3a_irqhandlers_h + sam3a_nvic_h + files(
        'sam/common/gpio_common_3a3u3x.c',
        'sam/common/gpio_common_all.c',
        'sam/common/pmc.c',


@@ 515,7 515,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + sam3n_irq + files(
    'src': src_cm3 + sam3n_vector_nvic_h + sam3n_irqhandlers_h + sam3n_nvic_h + files(
        'sam/common/gpio_common_3n3s.c',
        'sam/common/gpio_common_all.c',
        'sam/common/pmc.c',


@@ 537,7 537,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + sam3s_irq + files(
    'src': src_cm3 + sam3s_vector_nvic_h + sam3s_irqhandlers_h + sam3s_nvic_h + files(
        'sam/common/gpio_common_3n3s.c',
        'sam/common/gpio_common_all.c',
        'sam/common/pmc.c',


@@ 559,7 559,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + sam3u_irq + files(
    'src': src_cm3 + sam3u_vector_nvic_h + sam3u_irqhandlers_h + sam3u_nvic_h + files(
        'sam/common/gpio_common_3a3u3x.c',
        'sam/common/gpio_common_all.c',
        'sam/common/pmc.c',


@@ 581,7 581,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + sam3x_irq + files(
    'src': src_cm3 + sam3x_vector_nvic_h + sam3x_irqhandlers_h + sam3x_nvic_h + files(
        'sam/common/gpio_common_3a3u3x.c',
        'sam/common/gpio_common_all.c',
        'sam/common/pmc.c',


@@ 604,7 604,7 @@ targets += {
    'fp_args': [
        '-msoft-float',
    ],
    'src': src_cm3 + sam4l_irq + files(
    'src': src_cm3 + sam4l_vector_nvic_h + sam4l_irqhandlers_h + sam4l_nvic_h + files(
        'sam/4l/adcife.c',
        'sam/4l/gpio.c',
        'sam/4l/pm.c',


@@ 627,7 627,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + samd_irq + files(
    'src': src_cm3 + samd_vector_nvic_h + samd_irqhandlers_h + samd_nvic_h + files(
        'sam/d/port.c',
    ),
}


@@ 645,7 645,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + stm32f0_irq + files(
    'src': src_cm3 + stm32f0_vector_nvic_h + stm32f0_irqhandlers_h + stm32f0_nvic_h + files(
        'stm32/can.c',
        'stm32/common/adc_common_v2.c',
        'stm32/common/crc_common_all.c',


@@ 704,7 704,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + stm32f1_irq + files(
    'src': src_cm3 + stm32f1_vector_nvic_h + stm32f1_irqhandlers_h + stm32f1_nvic_h + files(
        'ethernet/mac.c',
        'ethernet/mac_stm32fxx7.c',
        'ethernet/phy.c',


@@ 765,7 765,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + stm32f2_irq + files(
    'src': src_cm3 + stm32f2_vector_nvic_h + stm32f2_irqhandlers_h + stm32f2_nvic_h + files(
        'stm32/common/crc_common_all.c',
        'stm32/common/crypto_common_f24.c',
        'stm32/common/dac_common_all.c',


@@ 825,7 825,7 @@ targets += {
        '-mfloat-abi=hard',
        '-mfpu=fpv4-sp-d16',
    ],
    'src': src_cm3 + stm32f3_irq + files(
    'src': src_cm3 + stm32f3_vector_nvic_h + stm32f3_irqhandlers_h + stm32f3_nvic_h + files(
        'stm32/can.c',
        'stm32/common/adc_common_v2.c',
        'stm32/common/adc_common_v2_multi.c',


@@ 885,7 885,7 @@ targets += {
        '-mfloat-abi=hard',
        '-mfpu=fpv4-sp-d16',
    ],
    'src': src_cm3 + stm32f4_irq + files(
    'src': src_cm3 + stm32f4_vector_nvic_h + stm32f4_irqhandlers_h + stm32f4_nvic_h + files(
        'ethernet/mac.c',
        'ethernet/mac_stm32fxx7.c',
        'ethernet/phy.c',


@@ 964,7 964,7 @@ targets += {
        '-mfloat-abi=hard',
        '-mfpu=fpv5-sp-d16',
    ],
    'src': src_cm3 + stm32f7_irq + files(
    'src': src_cm3 + stm32f7_vector_nvic_h + stm32f7_irqhandlers_h + stm32f7_nvic_h + files(
        'ethernet/mac.c',
        'ethernet/mac_stm32fxx7.c',
        'ethernet/phy.c',


@@ 1032,7 1032,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + stm32g0_irq + files(
    'src': src_cm3 + stm32g0_vector_nvic_h + stm32g0_irqhandlers_h + stm32g0_nvic_h + files(
        'stm32/common/adc_common_v2.c',
        'stm32/common/crc_common_all.c',
        'stm32/common/dac_common_all.c',


@@ 1078,7 1078,7 @@ targets += {
        '-mfloat-abi=hard',
        '-mfpu=fpv4-sp-d16',
    ],
    'src': src_cm3 + stm32g4_irq + files(
    'src': src_cm3 + stm32g4_vector_nvic_h + stm32g4_irqhandlers_h + stm32g4_nvic_h + files(
        'stm32/common/adc_common_v2.c',
        'stm32/common/adc_common_v2_multi.c',
        'stm32/common/cordic_common_v1.c',


@@ 1140,7 1140,7 @@ targets += {
        '-mfloat-abi=hard',
        '-mfpu=fpv5-d16',
    ],
    'src': src_cm3 + stm32h7_irq + files(
    'src': src_cm3 + stm32h7_vector_nvic_h + stm32h7_irqhandlers_h + stm32h7_nvic_h + files(
        'stm32/common/dac_common_all.c',
        'stm32/common/dac_common_v2.c',
        'stm32/common/exti_common_all.c',


@@ 1178,7 1178,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + stm32l0_irq + files(
    'src': src_cm3 + stm32l0_vector_nvic_h + stm32l0_irqhandlers_h + stm32l0_nvic_h + files(
        'stm32/common/adc_common_v2.c',
        'stm32/common/crc_common_all.c',
        'stm32/common/crc_v2.c',


@@ 1233,7 1233,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + stm32l1_irq + files(
    'src': src_cm3 + stm32l1_vector_nvic_h + stm32l1_irqhandlers_h + stm32l1_nvic_h + files(
        'stm32/common/adc_common_v1.c',
        'stm32/common/adc_common_v1_multi.c',
        'stm32/common/crc_common_all.c',


@@ 1292,7 1292,7 @@ targets += {
        '-mfloat-abi=hard',
        '-mfpu=fpv4-sp-d16',
    ],
    'src': src_cm3 + stm32l4_irq + files(
    'src': src_cm3 + stm32l4_vector_nvic_h + stm32l4_irqhandlers_h + stm32l4_nvic_h + files(
        'stm32/can.c',
        'stm32/common/adc_common_v2.c',
        'stm32/common/adc_common_v2_multi.c',


@@ 1353,7 1353,7 @@ targets += {
    ],
    'fp_args': [
    ],
    'src': src_cm3 + swm050_irq + files(
    'src': src_cm3 + swm050_vector_nvic_h + swm050_irqhandlers_h + swm050_nvic_h + files(
        'swm050/clk.c',
        'swm050/flash.c',
        'swm050/gpio.c',


@@ 1379,7 1379,7 @@ targets += {
        '-mfloat-abi=hard',
        '-mfpu=fpv4-sp-d16',
    ],
    'src': src_cm3 + vf6xx_irq + files(
    'src': src_cm3 + vf6xx_vector_nvic_h + vf6xx_irqhandlers_h + vf6xx_nvic_h + files(
        'vf6xx/ccm.c',
        'vf6xx/gpio.c',
        'vf6xx/iomuxc.c',

M lib/msp432/e4/meson.build => lib/msp432/e4/meson.build +4 -4
@@ 1,6 1,6 @@
msp432e4_irq = custom_target(
    'msp432e4' + ' '.join(outfiles),
msp432e4_vector_nvic_h = custom_target(
    'msp432e4_vector_nvic.h',
    input: msp432e4_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'msp432/e4'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/nrf/51/meson.build => lib/nrf/51/meson.build +4 -4
@@ 1,6 1,6 @@
nrf51_irq = custom_target(
    'nrf51' + ' '.join(outfiles),
nrf51_vector_nvic_h = custom_target(
    'nrf51_vector_nvic.h',
    input: nrf51_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'nrf/51'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/nrf/52/meson.build => lib/nrf/52/meson.build +4 -4
@@ 1,6 1,6 @@
nrf52_irq = custom_target(
    'nrf52' + ' '.join(outfiles),
nrf52_vector_nvic_h = custom_target(
    'nrf52_vector_nvic.h',
    input: nrf52_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'nrf/52'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/pac55xx/meson.build => lib/pac55xx/meson.build +4 -4
@@ 1,6 1,6 @@
pac55xx_irq = custom_target(
    'pac55xx' + ' '.join(outfiles),
pac55xx_vector_nvic_h = custom_target(
    'pac55xx_vector_nvic.h',
    input: pac55xx_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'pac55xx'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/sam/3a/meson.build => lib/sam/3a/meson.build +4 -4
@@ 1,6 1,6 @@
sam3a_irq = custom_target(
    'sam3a' + ' '.join(outfiles),
sam3a_vector_nvic_h = custom_target(
    'sam3a_vector_nvic.h',
    input: sam3a_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'sam/3a'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/sam/3n/meson.build => lib/sam/3n/meson.build +4 -4
@@ 1,6 1,6 @@
sam3n_irq = custom_target(
    'sam3n' + ' '.join(outfiles),
sam3n_vector_nvic_h = custom_target(
    'sam3n_vector_nvic.h',
    input: sam3n_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'sam/3n'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/sam/3s/meson.build => lib/sam/3s/meson.build +4 -4
@@ 1,6 1,6 @@
sam3s_irq = custom_target(
    'sam3s' + ' '.join(outfiles),
sam3s_vector_nvic_h = custom_target(
    'sam3s_vector_nvic.h',
    input: sam3s_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'sam/3s'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/sam/3u/meson.build => lib/sam/3u/meson.build +4 -4
@@ 1,6 1,6 @@
sam3u_irq = custom_target(
    'sam3u' + ' '.join(outfiles),
sam3u_vector_nvic_h = custom_target(
    'sam3u_vector_nvic.h',
    input: sam3u_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'sam/3u'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/sam/3x/meson.build => lib/sam/3x/meson.build +4 -4
@@ 1,6 1,6 @@
sam3x_irq = custom_target(
    'sam3x' + ' '.join(outfiles),
sam3x_vector_nvic_h = custom_target(
    'sam3x_vector_nvic.h',
    input: sam3x_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'sam/3x'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/sam/4l/meson.build => lib/sam/4l/meson.build +4 -4
@@ 1,6 1,6 @@
sam4l_irq = custom_target(
    'sam4l' + ' '.join(outfiles),
sam4l_vector_nvic_h = custom_target(
    'sam4l_vector_nvic.h',
    input: sam4l_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'sam/4l'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/sam/d/meson.build => lib/sam/d/meson.build +4 -4
@@ 1,6 1,6 @@
samd_irq = custom_target(
    'samd' + ' '.join(outfiles),
samd_vector_nvic_h = custom_target(
    'samd_vector_nvic.h',
    input: samd_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'sam/d'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/stm32/f0/meson.build => lib/stm32/f0/meson.build +4 -4
@@ 1,6 1,6 @@
stm32f0_irq = custom_target(
    'stm32f0' + ' '.join(outfiles),
stm32f0_vector_nvic_h = custom_target(
    'stm32f0_vector_nvic.h',
    input: stm32f0_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'stm32/f0'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/stm32/f1/meson.build => lib/stm32/f1/meson.build +4 -4
@@ 1,6 1,6 @@
stm32f1_irq = custom_target(
    'stm32f1' + ' '.join(outfiles),
stm32f1_vector_nvic_h = custom_target(
    'stm32f1_vector_nvic.h',
    input: stm32f1_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'stm32/f1'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/stm32/f2/meson.build => lib/stm32/f2/meson.build +4 -4
@@ 1,6 1,6 @@
stm32f2_irq = custom_target(
    'stm32f2' + ' '.join(outfiles),
stm32f2_vector_nvic_h = custom_target(
    'stm32f2_vector_nvic.h',
    input: stm32f2_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'stm32/f2'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/stm32/f3/meson.build => lib/stm32/f3/meson.build +4 -4
@@ 1,6 1,6 @@
stm32f3_irq = custom_target(
    'stm32f3' + ' '.join(outfiles),
stm32f3_vector_nvic_h = custom_target(
    'stm32f3_vector_nvic.h',
    input: stm32f3_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'stm32/f3'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/stm32/f4/meson.build => lib/stm32/f4/meson.build +4 -4
@@ 1,6 1,6 @@
stm32f4_irq = custom_target(
    'stm32f4' + ' '.join(outfiles),
stm32f4_vector_nvic_h = custom_target(
    'stm32f4_vector_nvic.h',
    input: stm32f4_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'stm32/f4'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/stm32/f7/meson.build => lib/stm32/f7/meson.build +4 -4
@@ 1,6 1,6 @@
stm32f7_irq = custom_target(
    'stm32f7' + ' '.join(outfiles),
stm32f7_vector_nvic_h = custom_target(
    'stm32f7_vector_nvic.h',
    input: stm32f7_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'stm32/f7'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/stm32/g0/meson.build => lib/stm32/g0/meson.build +4 -4
@@ 1,6 1,6 @@
stm32g0_irq = custom_target(
    'stm32g0' + ' '.join(outfiles),
stm32g0_vector_nvic_h = custom_target(
    'stm32g0_vector_nvic.h',
    input: stm32g0_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'stm32/g0'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/stm32/g4/meson.build => lib/stm32/g4/meson.build +4 -4
@@ 1,6 1,6 @@
stm32g4_irq = custom_target(
    'stm32g4' + ' '.join(outfiles),
stm32g4_vector_nvic_h = custom_target(
    'stm32g4_vector_nvic.h',
    input: stm32g4_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'stm32/g4'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/stm32/h7/meson.build => lib/stm32/h7/meson.build +4 -4
@@ 1,6 1,6 @@
stm32h7_irq = custom_target(
    'stm32h7' + ' '.join(outfiles),
stm32h7_vector_nvic_h = custom_target(
    'stm32h7_vector_nvic.h',
    input: stm32h7_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'stm32/h7'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/stm32/l0/meson.build => lib/stm32/l0/meson.build +4 -4
@@ 1,6 1,6 @@
stm32l0_irq = custom_target(
    'stm32l0' + ' '.join(outfiles),
stm32l0_vector_nvic_h = custom_target(
    'stm32l0_vector_nvic.h',
    input: stm32l0_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'stm32/l0'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/stm32/l1/meson.build => lib/stm32/l1/meson.build +4 -4
@@ 1,6 1,6 @@
stm32l1_irq = custom_target(
    'stm32l1' + ' '.join(outfiles),
stm32l1_vector_nvic_h = custom_target(
    'stm32l1_vector_nvic.h',
    input: stm32l1_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'stm32/l1'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/stm32/l4/meson.build => lib/stm32/l4/meson.build +4 -4
@@ 1,6 1,6 @@
stm32l4_irq = custom_target(
    'stm32l4' + ' '.join(outfiles),
stm32l4_vector_nvic_h = custom_target(
    'stm32l4_vector_nvic.h',
    input: stm32l4_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'stm32/l4'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/swm050/meson.build => lib/swm050/meson.build +4 -4
@@ 1,6 1,6 @@
swm050_irq = custom_target(
    'swm050' + ' '.join(outfiles),
swm050_vector_nvic_h = custom_target(
    'swm050_vector_nvic.h',
    input: swm050_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'swm050'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M lib/vf6xx/meson.build => lib/vf6xx/meson.build +4 -4
@@ 1,6 1,6 @@
vf6xx_irq = custom_target(
    'vf6xx' + ' '.join(outfiles),
vf6xx_vector_nvic_h = custom_target(
    'vf6xx_vector_nvic.h',
    input: vf6xx_json,
    output: outfiles,
    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', 'vf6xx'],
    output: 'vector_nvic.h',
    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],
)

M meson.build => meson.build +2 -8
@@ 6,13 6,7 @@ project(
)

inc = include_directories('include')

subdir('include/libopencm3')

# The script also generates vector_nvic.c, but this file is not
# listed in outfiles because it is not a complete compilation unit.
# It's included by another file.
outfiles = ['nvic.h', 'irqhandlers.h']
irq2nvic = find_program('scripts/irq2nvic_h.py')

subdir('include/libopencm3')
subdir('include/libopencmsis')
subdir('lib')

M scripts/irq2nvic_h => scripts/irq2nvic_h +8 -8
@@ 69,7 69,7 @@ END_DECLS
#endif /* {includeguard} */
'''

template_vector_nvic_c = '''\
template_vector_nvic_h = '''\
/* This file is part of the libopencm3 project.
 *
 * It was generated by the irq2nvic_h script.


@@ 128,7 128,7 @@ def convert(infile, outfile_nvic, outfile_vectornvic, outfile_cmsis):
    data['sourcefile'] = infile.name

    outfile_nvic.write(template_nvic_h.format(**data))
    outfile_vectornvic.write(template_vector_nvic_c.format(**data))
    outfile_vectornvic.write(template_vector_nvic_h.format(**data))
    outfile_cmsis.write(template_cmsis_h.format(**data))

def makeparentdir(filename):


@@ 152,26 152,26 @@ def main():
    if not infile.startswith('./include/libopencm3/') or not infile.endswith('/irq.json'):
        raise ValueError("Argument must match ./include/libopencm3/**/irq.json")
    nvic_h = infile.replace('irq.json', 'nvic.h')
    vector_nvic_c = infile.replace('./include/libopencm3/', './lib/').replace('irq.json', 'vector_nvic.c')
    vector_nvic_h = infile.replace('./include/libopencm3/', './lib/').replace('irq.json', 'vector_nvic.h')
    cmsis = infile.replace('irq.json', 'irqhandlers.h').replace('/libopencm3/', '/libopencmsis/')

    if remove:
        if os.path.exists(nvic_h):
            os.unlink(nvic_h)
        if os.path.exists(vector_nvic_c):
            os.unlink(vector_nvic_c)
        if os.path.exists(vector_nvic.h):
            os.unlink(vector_nvic.h)
        if os.path.exists(cmsis):
            os.unlink(cmsis)
        sys.exit(0)

    if not needs_update([__file__, infile], [nvic_h, vector_nvic_c]):
    if not needs_update([__file__, infile], [nvic_h, vector_nvic.h]):
        sys.exit(0)

    makeparentdir(nvic_h)
    makeparentdir(vector_nvic_c)
    makeparentdir(vector_nvic.h)
    makeparentdir(cmsis)

    convert(open(infile), open(nvic_h, 'w'), open(vector_nvic_c, 'w'), open(cmsis, 'w'))
    convert(open(infile), open(nvic_h, 'w'), open(vector_nvic.h, 'w'), open(cmsis, 'w'))

if __name__ == "__main__":
    main()

M scripts/irq2nvic_h.py => scripts/irq2nvic_h.py +14 -19
@@ 70,7 70,7 @@ END_DECLS
#endif /* {includeguard} */
'''

template_vector_nvic_c = '''\
template_vector_nvic_h = '''\
/* This file is part of the libopencm3 project.
 *
 * It was generated by the irq2nvic_h script.


@@ 110,9 110,8 @@ template_cmsis_h = '''\
{cmsisbends}
'''

def convert(infile, outfile_nvic, outfile_vectornvic, outfile_cmsis):
def convert(kind_flag, infile, outfile):
    data = json.load(infile)

    irq2name = list(enumerate(data['irqs']) if isinstance(data['irqs'], list) else data['irqs'].items())
    irqnames = [v for (k,v) in irq2name]



@@ 128,9 127,14 @@ def convert(infile, outfile_nvic, outfile_vectornvic, outfile_cmsis):
    data['cmsisbends'] = "\n".join("#define %s_IRQHandler %s_isr"%(name.upper(), name.lower()) for name in irqnames)
    data['sourcefile'] = infile.name

    outfile_nvic.write(template_nvic_h.format(**data))
    outfile_vectornvic.write(template_vector_nvic_c.format(**data))
    outfile_cmsis.write(template_cmsis_h.format(**data))
    templates = {
        '--nvic': template_nvic_h,
        '--vector_nvic': template_vector_nvic_h,
        '--irqhandlers': template_cmsis_h,
    }

    assert kind_flag in templates.keys()
    outfile.write(templates[kind_flag].format(**data))

def makeparentdir(filename):
    try:


@@ 140,19 144,10 @@ def makeparentdir(filename):
        pass

def main():
    infile = sys.argv[1]
    build_dir = sys.argv[2] # absolute path
    target = sys.argv[3] # path segment

    nvic_h = os.path.join(build_dir, 'lib/libopencm3', target, 'nvic.h')
    vector_nvic_c = os.path.join(build_dir, target, 'vector_nvic.c')
    cmsis = os.path.join(build_dir, 'libopencmsis', target, 'irqhandlers.h')

    makeparentdir(nvic_h)
    makeparentdir(vector_nvic_c)
    makeparentdir(cmsis)

    convert(open(infile), open(nvic_h, 'w'), open(vector_nvic_c, 'w'), open(cmsis, 'w'))
    kind_flag = sys.argv[1]
    infile = sys.argv[2]
    outfile = sys.argv[3]
    convert(kind_flag, open(infile), open(outfile, 'w'))

if __name__ == "__main__":
    main()

M scripts/make2meson.awk => scripts/make2meson.awk +43 -10
@@ 97,23 97,51 @@ BEGINFILE {
	}
}

function gen_nvic_h(segment, name) {
	subdir_path = "include/libopencm3/" segment "/meson.build"
	printf("%s_nvic_h = custom_target(\n", name) >subdir_path
	printf("    '%s_nvic.h',\n", name) >>subdir_path
	printf("    input: %s_json,\n", name) >>subdir_path
	print ("    output: 'nvic.h',") >>subdir_path
	printf("    command: [irq2nvic, '--nvic', '@INPUT@', '@OUTPUT@'],\n") >>subdir_path
	print (")") >>subdir_path
}

function gen_irqhandlers_h(segment, name) {
	if (name == "") {
		printf("segment: %s; name is empty\n", segment) >>/dev/stderr
		exit(1)
	}
	subdir_path = "include/libopencmsis/" segment "/meson.build"
	printf("%s_irqhandlers_h = custom_target(\n", name) >subdir_path
	printf("    '%s_irqhandlers.h',\n", name) >>subdir_path
	printf("    input: %s_json,\n", name) >>subdir_path
	print ("    output: 'irqhandlers.h',") >>subdir_path
	printf("    command: [irq2nvic, '--irqhandlers', '@INPUT@', '@OUTPUT@'],\n") >>subdir_path
	print (")") >>subdir_path
}

function gen_vector_nvic_h(segment, name) {
	subdir_path = "lib/" segment "/meson.build"
	printf("%s_vector_nvic_h = custom_target(\n", name) >subdir_path
	printf("    '%s_vector_nvic.h',\n", name) >>subdir_path
	printf("    input: %s_json,\n", name) >>subdir_path
	print ("    output: 'vector_nvic.h',") >>subdir_path
	printf("    command: [irq2nvic, '--vector_nvic', '@INPUT@', '@OUTPUT@'],\n") >>subdir_path
	print (")") >>subdir_path
}

ENDFILE {
	asort(sources)
	asort(c_args)
	asort(fp_args)
	asort(defines)

	subdir_path = "lib/" segment "/meson.build"
	if (name ~ /lm4f/) {
		printf("%s_irq = []\n", name) >subdir_path
	} else {
		printf("%s_irq = custom_target(\n", name) >subdir_path
		printf("    '%s' + ' '.join(outfiles),\n", name) >>subdir_path
		printf("    input: %s_json,\n", name) >>subdir_path
		print ("    output: outfiles,") >>subdir_path
		printf("    command: [irq2nvic, '@INPUT@', '@BUILD_ROOT@', '%s'],\n", segment) >>subdir_path
		print (")") >>subdir_path
	
		gen_irqhandlers_h(segment, name)
		gen_nvic_h(segment, name)
		gen_vector_nvic_h(segment, name)
		printf("subdir('%s')\n\n", segment)
	}



@@ 140,7 168,12 @@ ENDFILE {
	}

	print("    ],")
    	printf("    'src': src_cm3 + %s_irq + files(\n", name)

	if  (name ~ /lm4f/) {
		print("    'src': src_cm3 + files(")
	} else {
		printf("    'src': src_cm3 + %s_vector_nvic_h + %s_irqhandlers_h + %s_nvic_h + files(\n", name, name, name)
	}

	for (i in sources) {
		printf("        '%s',\n", sources[i])