@@ 45,7 45,7 @@ macro_rules! into_vy {
pub struct Display {
vmem:[u8; VMEMSIZE],
- videotimer: f32,
+ videotimer: u128,
pub vsync:bool,
}
@@ 54,7 54,7 @@ impl Display {
pub fn new() -> Self {
Self {
vmem: [0; VMEMSIZE],
- videotimer: 0.0,
+ videotimer: 0,
vsync: false,
}
}
@@ 82,10 82,11 @@ impl Display {
}
pub fn step(&mut self) -> failure::Fallible<()>{
- let now = SystemTime::now().duration_since(UNIX_EPOCH)?.as_secs_f32();
+ let now = SystemTime::now().duration_since(UNIX_EPOCH)?.as_millis();
+ self.vsync = false;
if now > self.videotimer {
self.vsync = true;
- self.videotimer = now + (1.0 / 60.0);
+ self.videotimer = now + 1000/60;
}
Ok(())
@@ 315,10 316,10 @@ impl Machine {
// Set Vx = Vx + kk.
if (op1 & 0xF0) == 0x70 {
let x = into_vx!(op1);
- log::debug!("PC:{:03X} {:02X}{:02X} ADD V{:X} {:02X}", self.pc, op1, op2, x, op2);
- log::debug!("\tV{:X}: {:02X}", x, self.vregister[x]);
+ //log::debug!("PC:{:03X} {:02X}{:02X} ADD V{:X}, {:02X}", self.pc, op1, op2, x, op2);
+ //log::debug!("\tV{:X}: {:02X}", x, self.vregister[x]);
self.vregister[x] = ((self.vregister[x] as u16 + op2 as u16) & 0xFF) as u8;
- log::debug!("\tV{:X}: {:02X}", x, self.vregister[x]);
+ //log::debug!("\tV{:X}: {:02X}", x, self.vregister[x]);
}
if (op1 & 0xF0) == 0x80 {
@@ 374,11 375,11 @@ impl Machine {
let y = into_vy!(op2);
let vx = self.vregister[x];
let vy = self.vregister[y];
- log::debug!("PC:{:03X} {:02X}{:02X} SUB V{:X} V{:X}", self.pc, op1, op2, x, y);
- log::debug!("\tV{:X}: {:02X} - V{:X}: {:02X}", x, vx, y, vy);
+ //log::debug!("PC:{:03X} {:02X}{:02X} SUB V{:X}, V{:X}", self.pc, op1, op2, x, y);
+ //log::debug!("\tV{:X}: {:02X} - V{:X}: {:02X}", x, vx, y, vy);
self.vregister[0xF] = (vx > vy).into();
self.vregister[x] = ((vx as i16) - (vy as i16)) as u8;
- log::debug!("\tVF: {:02X}, V{:X}: {:02X}", self.vregister[0xF], x, self.vregister[x]);
+ //log::debug!("\tVF: {:02X}, V{:X}: {:02X}", self.vregister[0xF], x, self.vregister[x]);
}
// 8xy6 - SHR Vx {, Vy}
@@ 416,12 417,12 @@ impl Machine {
if (op1 & 0xF0) == 0x90 {
let x = into_vx!(op1);
let y = into_vy!(op2);
- log::debug!("PC:{:03X} {:02X}{:02X} SNE V{:X}, V{:X}", self.pc - 2, op1, op2, x, y);
- log::debug!("\tV{:X}: {} != V{:X}: {}", x, self.vregister[x], y, self.vregister[y]);
+ //log::debug!("PC:{:03X} {:02X}{:02X} SNE V{:X}, V{:X}", self.pc - 2, op1, op2, x, y);
+ //log::debug!("\tV{:X}: {} != V{:X}: {}", x, self.vregister[x], y, self.vregister[y]);
if self.vregister[x] != self.vregister[y] {
self.pc += 2;
}
- log::debug!("\tPC:{:03X}", self.pc);
+ //log::debug!("\tPC:{:03X}", self.pc);
}
// Annn - LD I, addr
@@ 526,11 527,11 @@ impl Machine {
// Store registers V0 through Vx in memory starting at location I.
if op2 == 0x55 {
let x = into_vx!(op1);
- log::debug!("PC:{:03X} {:02X}{:02X} LD [I], V{:X}", self.pc, op1, op2, x);
+ //log::debug!("PC:{:03X} {:02X}{:02X} LD [I], V{:X}", self.pc, op1, op2, x);
for ptr in 0 .. (x + 1) {
- log::debug!("\tMEM[{:03X}] = V{:X}: {:02X}", self.iregister + ptr, ptr, self.vregister[ptr]);
+ //log::debug!("\tMEM[{:03X}] = V{:X}: {:02X}", self.iregister + ptr, ptr, self.vregister[ptr]);
self.memory[self.iregister + ptr] = self.vregister[ptr];
- log::debug!("\tMEM[{:03X}]: {:02X}", self.iregister + ptr, self.memory[self.iregister + ptr]);
+ //log::debug!("\tMEM[{:03X}]: {:02X}", self.iregister + ptr, self.memory[self.iregister + ptr]);
}
}