~fabrixxm/cippotto

1e725e3762df01221721eefa2e07a4b493192dee — fabrixxm 1 year, 5 months ago f52e57a
rustotto: fix

- ADD Vx, byte
- SUB Vx, Vy
- SNE Vx, Vy
- LD [I], Vx
- LD Vx, [I]

add some missing ';'
1 files changed, 23 insertions(+), 11 deletions(-)

M rustotto/src/main.rs
M rustotto/src/main.rs => rustotto/src/main.rs +23 -11
@@ 315,7 315,10 @@ impl Machine {
        // Set Vx = Vx + kk.
        if (op1 & 0xF0) == 0x70 {
            let x = into_vx!(op1);
            self.vregister[x] = ((self.vregister[x] as u16 + op2 as u16) % 0xFF) as u8
            log::debug!("PC:{:03X} {:02X}{:02X} ADD V{:X} {:02X}", self.pc, op1, op2, x, op2);
            log::debug!("\tV{:X}: {:02X}", x, self.vregister[x]);
            self.vregister[x] = ((self.vregister[x] as u16 + op2 as u16) & 0xFF) as u8;
            log::debug!("\tV{:X}: {:02X}", x, self.vregister[x]);
        }

        if (op1 & 0xF0) == 0x80  {


@@ 325,7 328,7 @@ impl Machine {
            if (op2 & 0x0F) == 0 {
                let x = into_vx!(op1);
                let y = into_vy!(op2);
                self.vregister[x] = self.vregister[y]
                self.vregister[x] = self.vregister[y];
            }

            // 8xy1 - OR Vx, Vy


@@ 333,7 336,7 @@ impl Machine {
            if (op2 & 0x0F) == 1 {
                let x = into_vx!(op1);
                let y = into_vy!(op2);
                self.vregister[x] |= self.vregister[y]
                self.vregister[x] |= self.vregister[y];
            }

            // 8xy2 - AND Vx, Vy


@@ 341,7 344,7 @@ impl Machine {
            if (op2 & 0x0F) == 2 {
                let x = into_vx!(op1);
                let y = into_vy!(op2);
                self.vregister[x] &= self.vregister[y]
                self.vregister[x] &= self.vregister[y];
            }

            // 8xy3 - XOR Vx, Vy


@@ 349,7 352,7 @@ impl Machine {
            if (op2 & 0x0F) == 3 {
                let x = into_vx!(op1);
                let y = into_vy!(op2);
                self.vregister[x] ^= self.vregister[y]
                self.vregister[x] ^= self.vregister[y];
            }

            // 8xy4 - ADD Vx, Vy


@@ 371,8 374,11 @@ impl Machine {
                let y = into_vy!(op2);
                let vx = self.vregister[x];
                let vy = self.vregister[y];
                log::debug!("PC:{:03X} {:02X}{:02X} SUB V{:X} V{:X}", self.pc, op1, op2, x, y);
                log::debug!("\tV{:X}: {:02X} - V{:X}: {:02X}", x, vx, y, vy);
                self.vregister[0xF] = (vx > vy).into();
                self.vregister[x] = (((vx as i16) - (vy as i16)).abs() % 0xFF) as u8;
                self.vregister[x] = ((vx as i16) - (vy as i16)) as u8;
                log::debug!("\tVF: {:02X}, V{:X}: {:02X}", self.vregister[0xF], x, self.vregister[x]);
            }

            // 8xy6 - SHR Vx {, Vy}


@@ 410,9 416,12 @@ impl Machine {
        if (op1 & 0xF0) == 0x90 {
            let x = into_vx!(op1);
            let y = into_vy!(op2);
            log::debug!("PC:{:03X} {:02X}{:02X} SNE V{:X}, V{:X}", self.pc - 2, op1, op2, x, y);
            log::debug!("\tV{:X}: {} !=  V{:X}: {}", x, self.vregister[x], y, self.vregister[y]);
            if self.vregister[x] != self.vregister[y]  {
                self.pc += 2;
            }
            log::debug!("\tPC:{:03X}", self.pc);
        }

        // Annn - LD I, addr


@@ 471,7 480,7 @@ impl Machine {
            // Fx0A - LD Vx, K
            // Wait for a key press, store the value of the key in Vx.
            if op2 == 0x0A {
                log::warn!("LD Vx, K (Fx0A) not implemented")
                log::warn!("LD Vx, K (Fx0A) not implemented");
                // TODO
            }



@@ 493,7 502,7 @@ impl Machine {
            // Set I = I + Vx.
            if op2 == 0x1E {
                let x = into_vx!(op1);
                self.iregister = self.iregister + (self.vregister[x] as usize)
                self.iregister = self.iregister + (self.vregister[x] as usize);
            }

            // Fx29 - LD F, Vx


@@ 517,16 526,19 @@ impl Machine {
            // Store registers V0 through Vx in memory starting at location I.
            if op2 == 0x55 {
                let x = into_vx!(op1);
                for ptr in 0 .. x {
                log::debug!("PC:{:03X} {:02X}{:02X} LD [I], V{:X}", self.pc, op1, op2, x);
                for ptr in 0 .. (x + 1) {
                    log::debug!("\tMEM[{:03X}] = V{:X}: {:02X}", self.iregister + ptr, ptr, self.vregister[ptr]);
                    self.memory[self.iregister + ptr] = self.vregister[ptr];
                    log::debug!("\tMEM[{:03X}]: {:02X}", self.iregister + ptr, self.memory[self.iregister + ptr]);
                }
            }

            //Fx65 - LD Vx, [I]
            // Read registers V0 through Vx from memory starting at location I.
            if op2 == 0x55 {
            if op2 == 0x65 {
                let x = into_vx!(op1);
                for ptr in 0 .. x {
                for ptr in 0 .. (x + 1) {
                    self.vregister[ptr] = self.memory[self.iregister + ptr];
                }
            }