chore(internal): remove unused allow attributes
ui: add errors for invalid discipline use
ui: error for unsupprted functions instead of crashing
OpenVAF is a Verilog-A compiler. The OpenVAF Project is not executable by itself but serves as the main component of various sub-projects such as VerilogAE and OSDIC. The major aim of this Project is to provide a high-quality standard compliant compiler for Verilog-A. Furthermore, the project aims to bring modern compiler construction algorithms/data structures to a field with a lack of such tooling.
Some highlights of OpenVAF include:
To build the project, simply run
cargo build
, which will build the project. The command
cargo test
will run the test cases.
The architectures of the rust-analyzer and rustc have heavily inspired the design of this compiler.
This work is free software and licensed under the GPL-3.0 license.
It contains code that is derived from rustc and rust-analyzer. These projects are both licensed und the MIT license. As required a copy of the license and disclaimer can be found in copyright/LICENSE_MIT