From ce30c930be0f157a14442b738993e54d8d0dc52f Mon Sep 17 00:00:00 2001 From: Charles Daniels Date: Sun, 6 Sep 2020 09:32:14 -0400 Subject: [PATCH] tweak comments --- riscv.awk | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/riscv.awk b/riscv.awk index 2cba833..a50f2a7 100644 --- a/riscv.awk +++ b/riscv.awk @@ -34,10 +34,10 @@ # # INTRODUCTION # -# This program implements a RISC-V disassemble and simulator, supporting most -# of the RV32I instruction set. It is controlled by reading directives on -# standard input. A directive consists of one or more whitespace separated -# values. Empty lines, and lines beginning with '#' are ignored. +# This program implements a RISC-V assembler, disassembler, and simulator, +# supporting most of the RV32I instruction set. It is controlled by reading +# directives on standard input. A directive consists of one or more whitespace +# separated values. Empty lines, and lines beginning with '#' are ignored. # # This program also has a concept of a "mode". In normal mode, which is the # default, all input lines are processed as directives. In other modes, input -- 2.30.1