~aperezdc/customasm-riscv

RISC-V rules for customasm
2bf679c2 — Adrian Perez de Castro 3 years ago 
Complete rule definitions for S extension instructions
76ccc79f — Adrian Perez de Castro 3 years ago 
Fill-in codes for the CSRs
43d3bc07 — Adrian Perez de Castro 3 years ago 
Add the "li" pseudoinstruction

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#RISC-V rules for customasm

This repository contains rule definitions to make customasm generate RISC-V code.

#Usage

cat > loop.asm <<EOF
  addi x2, x0, 1
loop:
  sub x1, x1, x2
  sw  x1, 4(x0) 
  blt x0, x1, loop
EOF
customasm -o loop.bin rv32.asm loop.asm

Only flat binaries are supported at the moment.

#Status

32-bit:

  • Implemented: ?
  • In progress: ISM.
  • Planned: ?

64-bit:

  • Implemented: ?
  • In progress: ISM.
  • Planned: ?