ref: 9f7ac011901ec1eaa4253f392e21f4b659791fe1 bsr/README.md -rw-r--r-- 464 bytes
9f7ac011 — Andrew Kay Update project description 7 months ago


Remove the header from a Xilinx FPGA bitstream.

I believe you can achieve something similar using:

  • The write_bitstream Tcl command -bin_file option
  • The Xilinx Bootgen tool

Really, this was just an excuse to try writing a utility using Rust.


Okay, so you still want to use it? I've found it useful for uploading a bitstream using the Linux FPGA manager:

bsr -i design_1_wrapper.bit > /lib/firmware/design_1_wrapper.bit.bin