~ajk/bsr

fa3a3ce82db39fe06af8e37f2800d9a545bfb392 — Andrew Kay 11 months ago 63191b3
Update documentation
2 files changed, 4 insertions(+), 2 deletions(-)

M Cargo.toml
M README.md
M Cargo.toml => Cargo.toml +1 -1
@@ 3,7 3,7 @@ name = "bsr"
version = "0.1.0"
authors = [ "Andrew Kay <projects@ajk.me>" ]
edition = "2018"
description = "A useless utility for removing the header from a Xilinx FPGA bitstream"
description = "Useless utility for removing the header from a Xilinx FPGA bitstream"
repository = "https://git.sr.ht/~ajk/bsr"
license = "ISC"


M README.md => README.md +3 -1
@@ 1,6 1,6 @@
# bsr

A useless utility for removing the header from a Xilinx FPGA bitstream.
Useless utility for removing the header from a Xilinx FPGA bitstream.

I believe you can achieve something similar using:



@@ 9,6 9,8 @@ I believe you can achieve something similar using:

Really, this was just an excuse to try writing a utility using Rust.

## Usage

Okay, so you still want to use it? I've found it useful for uploading a bitstream using the Linux FPGA manager:

```