~ajk/bsr

A useless utility for removing the header from a Xilinx FPGA bitstream
63191b36 — Andrew Kay a day ago
Cleanup and refactor argument parsing
7b9aacc5 — Andrew Kay a day ago
Refactor run parameters
c0a08ebe — Andrew Kay 2 days ago
Make Header derive Debug

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#bsr

A useless utility for removing the header from a Xilinx FPGA bitstream.

I believe you can achieve something similar using:

  • The write_bitstream Tcl command -bin_file option
  • The Xilinx Bootgen tool

Really, this was just an excuse to try writing a utility using Rust.

Okay, so you still want to use it? I've found it useful for uploading a bitstream using the Linux FPGA manager:

bsr -i design_1_wrapper.bit > /lib/firmware/design_1_wrapper.bit.bin